radeonsi/gfx10: fix corruption for chips with harvested TCCs
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
index 2c3471de9ea3129e698bfcc8da99b903ced0c5cf..1906bdf16b2c41a9264236f474170610ec3ecb1a 100644 (file)
@@ -1684,7 +1684,9 @@ si_make_CB_shader_coherent(struct si_context *sctx, unsigned num_samples,
                       SI_CONTEXT_INV_VCACHE;
 
        if (sctx->chip_class >= GFX10) {
-               if (shaders_read_metadata)
+               if (sctx->screen->info.tcc_harvested)
+                       sctx->flags |= SI_CONTEXT_INV_L2;
+               else if (shaders_read_metadata)
                        sctx->flags |= SI_CONTEXT_INV_L2_METADATA;
        } else if (sctx->chip_class == GFX9) {
                /* Single-sample color is coherent with shaders on GFX9, but
@@ -1710,7 +1712,9 @@ si_make_DB_shader_coherent(struct si_context *sctx, unsigned num_samples,
                       SI_CONTEXT_INV_VCACHE;
 
        if (sctx->chip_class >= GFX10) {
-               if (shaders_read_metadata)
+               if (sctx->screen->info.tcc_harvested)
+                       sctx->flags |= SI_CONTEXT_INV_L2;
+               else if (shaders_read_metadata)
                        sctx->flags |= SI_CONTEXT_INV_L2_METADATA;
        } else if (sctx->chip_class == GFX9) {
                /* Single-sample depth (not stencil) is coherent with shaders