radeonsi: Add CIK SDMA support
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
index c95774d6f5e7d4481a16634d4803d842d8e88f95..2d67342f1608dc8aad026766afb5bbbaa3629f18 100644 (file)
 
 #include "si_state.h"
 
+#include <llvm-c/TargetMachine.h>
+
 #ifdef PIPE_ARCH_BIG_ENDIAN
 #define SI_BIG_ENDIAN 1
 #else
 #define SI_BIG_ENDIAN 0
 #endif
 
+/* The base vertex and primitive restart can be any number, but we must pick
+ * one which will mean "unknown" for the purpose of state tracking and
+ * the number shouldn't be a commonly-used one. */
+#define SI_BASE_VERTEX_UNKNOWN INT_MIN
+#define SI_RESTART_INDEX_UNKNOWN INT_MIN
+#define SI_NUM_SMOOTH_AA_SAMPLES 8
+
 #define SI_TRACE_CS 0
 #define SI_TRACE_CS_DWORDS             6
 
-#define SI_MAX_DRAW_CS_DWORDS 18
-
-struct si_pipe_compute;
+#define SI_MAX_DRAW_CS_DWORDS \
+       (/*scratch:*/ 3 + /*derived prim state:*/ 3 + \
+        /*draw regs:*/ 16 + /*draw packets:*/ 31)
+
+/* Instruction cache. */
+#define SI_CONTEXT_INV_ICACHE          (R600_CONTEXT_PRIVATE_FLAG << 0)
+/* Cache used by scalar memory (SMEM) instructions. They also use TC
+ * as a second level cache, which isn't flushed by this.
+ * Other names: constant cache, data cache, DCACHE */
+#define SI_CONTEXT_INV_KCACHE          (R600_CONTEXT_PRIVATE_FLAG << 1)
+/* Caches used by vector memory (VMEM) instructions.
+ * L1 can optionally be bypassed (GLC=1) and can only be used by shaders.
+ * L2 is used by shaders and can be used by other blocks (CP, sDMA). */
+#define SI_CONTEXT_INV_TC_L1           (R600_CONTEXT_PRIVATE_FLAG << 2)
+#define SI_CONTEXT_INV_TC_L2           (R600_CONTEXT_PRIVATE_FLAG << 3)
+/* Framebuffer caches. */
+#define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 4)
+#define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 5)
+#define SI_CONTEXT_FLUSH_AND_INV_DB    (R600_CONTEXT_PRIVATE_FLAG << 6)
+#define SI_CONTEXT_FLUSH_AND_INV_CB    (R600_CONTEXT_PRIVATE_FLAG << 7)
+/* Engine synchronization. */
+#define SI_CONTEXT_VS_PARTIAL_FLUSH    (R600_CONTEXT_PRIVATE_FLAG << 8)
+#define SI_CONTEXT_PS_PARTIAL_FLUSH    (R600_CONTEXT_PRIVATE_FLAG << 9)
+#define SI_CONTEXT_CS_PARTIAL_FLUSH    (R600_CONTEXT_PRIVATE_FLAG << 10)
+#define SI_CONTEXT_VGT_FLUSH           (R600_CONTEXT_PRIVATE_FLAG << 11)
+#define SI_CONTEXT_VGT_STREAMOUT_SYNC  (R600_CONTEXT_PRIVATE_FLAG << 12)
+/* Compute only. */
+#define SI_CONTEXT_FLUSH_WITH_INV_L2   (R600_CONTEXT_PRIVATE_FLAG << 13) /* TODO: merge with TC? */
+#define SI_CONTEXT_FLAG_COMPUTE                (R600_CONTEXT_PRIVATE_FLAG << 14)
+
+#define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
+                                             SI_CONTEXT_FLUSH_AND_INV_CB_META | \
+                                             SI_CONTEXT_FLUSH_AND_INV_DB | \
+                                             SI_CONTEXT_FLUSH_AND_INV_DB_META)
+
+struct si_compute;
 
 struct si_screen {
        struct r600_common_screen       b;
 };
 
-struct si_pipe_sampler_view {
+struct si_sampler_view {
        struct pipe_sampler_view        base;
+       struct list_head                list;
        struct r600_resource            *resource;
+        /* [0..7] = image descriptor
+         * [4..7] = buffer descriptor */
        uint32_t                        state[8];
        uint32_t                        fmask_state[8];
 };
 
-struct si_pipe_sampler_state {
+struct si_sampler_state {
        uint32_t                        val[4];
        uint32_t                        border_color[4];
 };
 
 struct si_cs_shader_state {
-       struct si_pipe_compute          *program;
+       struct si_compute               *program;
 };
 
 struct si_textures_info {
        struct si_sampler_views         views;
-       struct si_pipe_sampler_state    *samplers[SI_NUM_USER_SAMPLERS];
-       unsigned                        n_views;
+       struct si_sampler_states        states;
        uint32_t                        depth_texture_mask; /* which textures are depth */
        uint32_t                        compressed_colortex_mask;
-       unsigned                        n_samplers;
 };
 
 struct si_framebuffer {
@@ -87,64 +130,66 @@ struct si_framebuffer {
 struct si_context {
        struct r600_common_context      b;
        struct blitter_context          *blitter;
-       void                            *custom_dsa_flush_depth_stencil[8];
-       void                            *custom_dsa_flush_depth[8];
-       void                            *custom_dsa_flush_stencil[8];
-       void                            *custom_dsa_flush_inplace;
+       void                            *custom_dsa_flush;
        void                            *custom_blend_resolve;
        void                            *custom_blend_decompress;
        void                            *custom_blend_fastclear;
+       void                            *pstipple_sampler_state;
        struct si_screen                *screen;
+       struct si_pm4_state             *init_config;
 
        union {
                struct {
                        /* The order matters. */
+                       struct r600_atom *vertex_buffers;
                        struct r600_atom *const_buffers[SI_NUM_SHADERS];
                        struct r600_atom *rw_buffers[SI_NUM_SHADERS];
                        struct r600_atom *sampler_views[SI_NUM_SHADERS];
+                       struct r600_atom *sampler_states[SI_NUM_SHADERS];
                        /* Caches must be flushed after resource descriptors are
                         * updated in memory. */
                        struct r600_atom *cache_flush;
                        struct r600_atom *streamout_begin;
                        struct r600_atom *streamout_enable; /* must be after streamout_begin */
                        struct r600_atom *framebuffer;
+                       struct r600_atom *msaa_sample_locs;
+                       struct r600_atom *db_render_state;
                        struct r600_atom *msaa_config;
+                       struct r600_atom *clip_regs;
                } s;
                struct r600_atom *array[0];
        } atoms;
 
        struct si_framebuffer           framebuffer;
        struct si_vertex_element        *vertex_elements;
-       unsigned                        pa_sc_line_stipple;
-       unsigned                        pa_su_sc_mode_cntl;
        /* for saving when using blitter */
        struct pipe_stencil_ref         stencil_ref;
-       struct si_pipe_shader_selector  *ps_shader;
-       struct si_pipe_shader_selector  *gs_shader;
-       struct si_pipe_shader_selector  *vs_shader;
+       /* shaders */
+       struct si_shader_selector       *ps_shader;
+       struct si_shader_selector       *gs_shader;
+       struct si_shader_selector       *vs_shader;
        struct si_cs_shader_state       cs_shader_state;
        /* shader information */
        unsigned                        sprite_coord_enable;
+       bool                            flatshade;
+       struct si_descriptors           vertex_buffers;
        struct si_buffer_resources      const_buffers[SI_NUM_SHADERS];
        struct si_buffer_resources      rw_buffers[SI_NUM_SHADERS];
-       struct si_textures_info samplers[SI_NUM_SHADERS];
+       struct si_textures_info         samplers[SI_NUM_SHADERS];
+       struct r600_resource            *scratch_buffer;
        struct r600_resource            *border_color_table;
        unsigned                        border_color_offset;
 
+       struct r600_atom                clip_regs;
+       struct r600_atom                msaa_sample_locs;
        struct r600_atom                msaa_config;
        int                             ps_iter_samples;
-
-       unsigned default_ps_gprs, default_vs_gprs;
-
-       /* Below are variables from the old r600_context.
-        */
-       unsigned                pm4_dirty_cdwords;
+       bool                            smoothing_enabled;
 
        /* Vertex and index buffers. */
        bool                    vertex_buffers_dirty;
        struct pipe_index_buffer index_buffer;
-       struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
-       unsigned                nr_vertex_buffers;
+       struct pipe_vertex_buffer vertex_buffer[SI_NUM_VERTEX_BUFFERS];
 
        /* With rasterizer discard, there doesn't have to be a pixel shader.
         * In that case, we bind this one: */
@@ -154,20 +199,66 @@ struct si_context {
        struct si_pm4_state     *gs_rings;
        struct r600_atom        cache_flush;
        struct pipe_constant_buffer null_const_buf; /* used for set_constant_buffer(NULL) on CIK */
-       struct pipe_constant_buffer esgs_ring;
-       struct pipe_constant_buffer gsvs_ring;
+       struct pipe_resource    *esgs_ring;
+       struct pipe_resource    *gsvs_ring;
+
+       LLVMTargetMachineRef            tm;
 
        /* SI state handling */
        union si_state  queued;
        union si_state  emitted;
+
+       /* DB render state. */
+       struct r600_atom        db_render_state;
+       bool                    dbcb_depth_copy_enabled;
+       bool                    dbcb_stencil_copy_enabled;
+       unsigned                dbcb_copy_sample;
+       bool                    db_inplace_flush_enabled;
+       bool                    db_depth_clear;
+       bool                    db_depth_disable_expclear;
+       unsigned                ps_db_shader_control;
+
+       /* Draw state. */
+       int                     last_base_vertex;
+       int                     last_start_instance;
+       int                     last_sh_base_reg;
+       int                     last_primitive_restart_en;
+       int                     last_restart_index;
+       int                     last_gs_out_prim;
+       int                     last_prim;
+       int                     last_multi_vgt_param;
+       int                     last_rast_prim;
+       unsigned                last_sc_line_stipple;
+       int                     current_rast_prim; /* primitive type after TES, GS */
+
+       /* Scratch buffer */
+       boolean                 emit_scratch_reloc;
+       unsigned                scratch_waves;
+       unsigned                spi_tmpring_size;
 };
 
+/* cik_sdma.c */
+void cik_sdma_copy(struct pipe_context *ctx,
+                  struct pipe_resource *dst,
+                  unsigned dst_level,
+                  unsigned dstx, unsigned dsty, unsigned dstz,
+                  struct pipe_resource *src,
+                  unsigned src_level,
+                  const struct pipe_box *src_box);
+
 /* si_blit.c */
 void si_init_blit_functions(struct si_context *sctx);
 void si_flush_depth_textures(struct si_context *sctx,
                             struct si_textures_info *textures);
 void si_decompress_color_textures(struct si_context *sctx,
                                  struct si_textures_info *textures);
+void si_resource_copy_region(struct pipe_context *ctx,
+                            struct pipe_resource *dst,
+                            unsigned dst_level,
+                            unsigned dstx, unsigned dsty, unsigned dstz,
+                            struct pipe_resource *src,
+                            unsigned src_level,
+                            const struct pipe_box *src_box);
 
 /* si_dma.c */
 void si_dma_copy(struct pipe_context *ctx,
@@ -211,4 +302,12 @@ si_resource_create_custom(struct pipe_screen *screen,
                PIPE_BIND_CUSTOM, usage, size));
 }
 
+static INLINE void
+si_invalidate_draw_sh_constants(struct si_context *sctx)
+{
+       sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN;
+       sctx->last_start_instance = -1; /* reset to an unknown value */
+       sctx->last_sh_base_reg = -1; /* reset to an unknown value */
+}
+
 #endif