radeonsi: fix scratch buffer WAVESIZE setting leading to corruption

[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 6060c579ceb98b6c4717806207530322d66726e7..86aee2e0824894cf1c65af308fcc0e0afed84c56 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -145,7 +145,6 @@ enum {
 
        /* Shader compiler options the shader cache should be aware of: */
        DBG_FS_CORRECT_DERIVS_AFTER_KILL,
-       DBG_UNSAFE_MATH,
        DBG_SI_SCHED,
        DBG_GISEL,
        DBG_W32_GE,
@@ -176,6 +175,7 @@ enum {
 
        /* 3D engine options: */
        DBG_NO_GFX,
+       DBG_NO_NGG,
        DBG_ALWAYS_PD,
        DBG_PD,
        DBG_NO_PD,
@@ -492,19 +492,15 @@ struct si_screen {
        unsigned                        eqaa_force_coverage_samples;
        unsigned                        eqaa_force_z_samples;
        unsigned                        eqaa_force_color_samples;
-       bool                            has_clear_state;
-       bool                            has_distributed_tess;
        bool                            has_draw_indirect_multi;
        bool                            has_out_of_order_rast;
        bool                            assume_no_z_fights;
        bool                            commutative_blend_add;
-       bool                            has_gfx9_scissor_bug;
-       bool                            has_msaa_sample_loc_bug;
-       bool                            has_ls_vgpr_init_bug;
-       bool                            has_dcc_constant_encode;
        bool                            dpbb_allowed;
        bool                            dfsm_allowed;
        bool                            llvm_has_working_vgpr_indexing;
+       bool                            use_ngg;
+       bool                            use_ngg_streamout;
 
        struct {
 #define OPT_BOOL(name, dflt, description) bool name:1;
@@ -514,10 +510,7 @@ struct si_screen {
        /* Whether shaders are monolithic (1-part) or separate (3-part). */
        bool                            use_monolithic_shaders;
        bool                            record_llvm_ir;
-       bool                            has_rbplus;     /* if RB+ registers exist */
-       bool                            rbplus_allowed; /* if RB+ is allowed */
        bool                            dcc_msaa_allowed;
-       bool                            cpdma_prefetch_writes_memory;
 
        struct slab_parent_pool         pool_transfers;
 
@@ -887,6 +880,8 @@ struct si_context {
 
        struct blitter_context          *blitter;
        void                            *noop_blend;
+       void                            *noop_dsa;
+       void                            *discard_rasterizer_state;
        void                            *custom_dsa_flush;
        void                            *custom_blend_resolve;
        void                            *custom_blend_fmask_decompress;
@@ -1083,6 +1078,8 @@ struct si_context {
        struct si_resource      *scratch_buffer;
        unsigned                scratch_waves;
        unsigned                spi_tmpring_size;
+       unsigned                max_seen_scratch_bytes_per_wave;
+       unsigned                max_seen_compute_scratch_bytes_per_wave;
 
        struct si_resource      *compute_scratch_buffer;
 
@@ -1909,7 +1906,8 @@ static inline unsigned si_get_wave_size(struct si_screen *sscreen,
                return sscreen->compute_wave_size;
        else if (shader_type == PIPE_SHADER_FRAGMENT)
                return sscreen->ps_wave_size;
-       else if ((shader_type == PIPE_SHADER_TESS_EVAL && es && !ngg) ||
+       else if ((shader_type == PIPE_SHADER_VERTEX && es && !ngg) ||
+                (shader_type == PIPE_SHADER_TESS_EVAL && es && !ngg) ||
                 (shader_type == PIPE_SHADER_GEOMETRY && !ngg)) /* legacy GS only supports Wave64 */
                return 64;
        else