radeonsi: stop using TGSI_PROPERTY_CS_*

[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 9ad14cab96a28f44729f26dcfff71bd83400283e..94103919fd4232e992b224900d56276f554e8252 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -141,12 +141,12 @@ enum si_clear_code
 enum
 {
    /* Shader logging options: */
-   DBG_VS = PIPE_SHADER_VERTEX,
-   DBG_PS = PIPE_SHADER_FRAGMENT,
-   DBG_GS = PIPE_SHADER_GEOMETRY,
-   DBG_TCS = PIPE_SHADER_TESS_CTRL,
-   DBG_TES = PIPE_SHADER_TESS_EVAL,
-   DBG_CS = PIPE_SHADER_COMPUTE,
+   DBG_VS = MESA_SHADER_VERTEX,
+   DBG_TCS = MESA_SHADER_TESS_CTRL,
+   DBG_TES = MESA_SHADER_TESS_EVAL,
+   DBG_GS = MESA_SHADER_GEOMETRY,
+   DBG_PS = MESA_SHADER_FRAGMENT,
+   DBG_CS = MESA_SHADER_COMPUTE,
    DBG_NO_IR,
    DBG_NO_NIR,
    DBG_NO_ASM,
@@ -162,6 +162,7 @@ enum
    DBG_W64_PS,
    DBG_W64_CS,
    DBG_KILL_PS_INF_INTERP,
+   DBG_CLAMP_DIV_BY_ZERO,
 
    /* Shader compiler options (with no effect on the shader cache): */
    DBG_CHECK_IR,
@@ -184,11 +185,13 @@ enum
    DBG_CHECK_VM,
    DBG_RESERVE_VMID,
    DBG_ZERO_VRAM,
+   DBG_SHADOW_REGS,
 
    /* 3D engine options: */
    DBG_NO_GFX,
    DBG_NO_NGG,
-   DBG_ALWAYS_NGG_CULLING,
+   DBG_ALWAYS_NGG_CULLING_ALL,
+   DBG_ALWAYS_NGG_CULLING_TESS,
    DBG_NO_NGG_CULLING,
    DBG_ALWAYS_PD,
    DBG_PD,
@@ -431,7 +434,7 @@ struct si_mmio_counter {
 };
 
 union si_mmio_counters {
-   struct {
+   struct si_mmio_counters_named {
       /* For global GPU load including SDMA. */
       struct si_mmio_counter gpu;
 
@@ -462,7 +465,8 @@ union si_mmio_counters {
       struct si_mmio_counter cp_dma;
       struct si_mmio_counter scratch_ram;
    } named;
-   unsigned array[0];
+
+   unsigned array[sizeof(struct si_mmio_counters_named) / sizeof(unsigned)];
 };
 
 struct si_memory_object {
@@ -486,6 +490,7 @@ struct si_screen {
    struct disk_cache *disk_shader_cache;
 
    struct radeon_info info;
+   struct nir_shader_compiler_options nir_options;
    uint64_t debug_flags;
    char renderer_string[183];
 
@@ -517,7 +522,8 @@ struct si_screen {
    bool llvm_has_working_vgpr_indexing;
    bool use_ngg;
    bool use_ngg_culling;
-   bool always_use_ngg_culling;
+   bool always_use_ngg_culling_all;
+   bool always_use_ngg_culling_tess;
    bool use_ngg_streamout;
 
    struct {
@@ -909,6 +915,7 @@ struct si_context {
    struct u_log_context *log;
    void *query_result_shader;
    void *sh_query_result_shader;
+   struct si_resource *shadowed_regs;
 
    void (*emit_cache_flush)(struct si_context *ctx);
 
@@ -1365,6 +1372,9 @@ void si_cp_copy_data(struct si_context *sctx, struct radeon_cmdbuf *cs, unsigned
                      struct si_resource *dst, unsigned dst_offset, unsigned src_sel,
                      struct si_resource *src, unsigned src_offset);
 
+/* si_cp_reg_shadowing.c */
+void si_init_cp_reg_shadowing(struct si_context *sctx);
+
 /* si_debug.c */
 void si_save_cs(struct radeon_winsys *ws, struct radeon_cmdbuf *cs, struct radeon_saved_cs *saved,
                 bool get_buffer_list);
@@ -1412,7 +1422,7 @@ void si_init_screen_get_functions(struct si_screen *sscreen);
 void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_handle **fence);
 void si_allocate_gds(struct si_context *ctx);
 void si_set_tracked_regs_to_clear_state(struct si_context *ctx);
-void si_begin_new_gfx_cs(struct si_context *ctx);
+void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs);
 void si_need_gfx_cs_space(struct si_context *ctx);
 void si_unref_sdma_uploads(struct si_context *sctx);
 
@@ -1649,9 +1659,9 @@ static inline struct si_shader *si_get_vs_state(struct si_context *sctx)
    return vs->current ? vs->current : NULL;
 }
 
-static inline bool si_can_dump_shader(struct si_screen *sscreen, unsigned processor)
+static inline bool si_can_dump_shader(struct si_screen *sscreen, gl_shader_stage stage)
 {
-   return sscreen->debug_flags & (1 << processor);
+   return sscreen->debug_flags & (1 << stage);
 }
 
 static inline bool si_get_strmout_en(struct si_context *sctx)
@@ -1879,19 +1889,19 @@ static inline bool si_compute_prim_discard_enabled(struct si_context *sctx)
 }
 
 static inline unsigned si_get_wave_size(struct si_screen *sscreen,
-                                        enum pipe_shader_type shader_type, bool ngg, bool es,
+                                        gl_shader_stage stage, bool ngg, bool es,
                                         bool gs_fast_launch, bool prim_discard_cs)
 {
-   if (shader_type == PIPE_SHADER_COMPUTE)
+   if (stage == MESA_SHADER_COMPUTE)
       return sscreen->compute_wave_size;
-   else if (shader_type == PIPE_SHADER_FRAGMENT)
+   else if (stage == MESA_SHADER_FRAGMENT)
       return sscreen->ps_wave_size;
    else if (gs_fast_launch)
       return 32; /* GS fast launch hangs with Wave64, so always use Wave32. */
-   else if ((shader_type == PIPE_SHADER_VERTEX && prim_discard_cs) || /* only Wave64 implemented */
-            (shader_type == PIPE_SHADER_VERTEX && es && !ngg) ||
-            (shader_type == PIPE_SHADER_TESS_EVAL && es && !ngg) ||
-            (shader_type == PIPE_SHADER_GEOMETRY && !ngg)) /* legacy GS only supports Wave64 */
+   else if ((stage == MESA_SHADER_VERTEX && prim_discard_cs) || /* only Wave64 implemented */
+            (stage == MESA_SHADER_VERTEX && es && !ngg) ||
+            (stage == MESA_SHADER_TESS_EVAL && es && !ngg) ||
+            (stage == MESA_SHADER_GEOMETRY && !ngg)) /* legacy GS only supports Wave64 */
       return 64;
    else
       return sscreen->ge_wave_size;
@@ -1899,7 +1909,8 @@ static inline unsigned si_get_wave_size(struct si_screen *sscreen,
 
 static inline unsigned si_get_shader_wave_size(struct si_shader *shader)
 {
-   return si_get_wave_size(shader->selector->screen, shader->selector->type, shader->key.as_ngg,
+   return si_get_wave_size(shader->selector->screen, shader->selector->info.stage,
+                           shader->key.as_ngg,
                            shader->key.as_es,
                            shader->key.opt.ngg_culling & SI_NGG_CULL_GS_FAST_LAUNCH_ALL,
                            shader->key.opt.vs_as_prim_discard_cs);