radeonsi: skip DCC render feedback checking if color writes are disabled

[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index e3d45ef6c3b2b45a4958fbd528b209a16ca24cc8..e65c946d1867166a8c436f09dd4e45013277d672 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -940,4 +940,21 @@ static inline unsigned si_get_ps_iter_samples(struct si_context *sctx)
        return sctx->ps_iter_samples;
 }
 
+static inline unsigned si_get_total_colormask(struct si_context *sctx)
+{
+       if (sctx->queued.named.rasterizer->rasterizer_discard)
+               return 0;
+
+       struct si_shader_selector *ps = sctx->ps_shader.cso;
+       unsigned colormask = sctx->framebuffer.colorbuf_enabled_4bit &
+                            sctx->queued.named.blend->cb_target_mask;
+
+       if (!ps->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
+               colormask &= ps->colors_written_4bit;
+       else if (!ps->colors_written_4bit)
+               colormask = 0; /* color0 writes all cbufs, but it's not written */
+
+       return colormask;
+}
+
 #endif