* Christian König <christian.koenig@amd.com>
*/
-#include "../radeon/r600_cs.h"
+#include "radeon/r600_cs.h"
#include "util/u_memory.h"
#include "si_pipe.h"
-#include "si_pm4.h"
#include "sid.h"
#define NUMBER_OF_STATES (sizeof(union si_state) / sizeof(struct si_pm4_state *))
void si_pm4_add_bo(struct si_pm4_state *state,
struct r600_resource *bo,
- enum radeon_bo_usage usage)
+ enum radeon_bo_usage usage,
+ enum radeon_bo_priority priority)
{
unsigned idx = state->nbo++;
assert(idx < SI_PM4_MAX_BO);
r600_resource_reference(&state->bo[idx], bo);
state->bo_usage[idx] = usage;
+ state->bo_priority[idx] = priority;
}
-void si_pm4_sh_data_begin(struct si_pm4_state *state)
-{
- si_pm4_cmd_begin(state, PKT3_NOP);
-}
-
-void si_pm4_sh_data_add(struct si_pm4_state *state, uint32_t dw)
-{
- si_pm4_cmd_add(state, dw);
-}
-
-void si_pm4_sh_data_end(struct si_pm4_state *state, unsigned base, unsigned idx)
-{
- unsigned offs = state->last_pm4 + 1;
- unsigned reg = base + idx * 4;
-
- /* Bail if no data was added */
- if (state->ndw == offs) {
- state->ndw--;
- return;
- }
-
- si_pm4_cmd_end(state, false);
-
- si_pm4_cmd_begin(state, PKT3_SET_SH_REG_OFFSET);
- si_pm4_cmd_add(state, (reg - SI_SH_REG_OFFSET) >> 2);
- state->relocs[state->nrelocs++] = state->ndw;
- si_pm4_cmd_add(state, offs << 2);
- si_pm4_cmd_add(state, 0);
- si_pm4_cmd_end(state, false);
-}
-
-void si_pm4_inval_shader_cache(struct si_pm4_state *state)
-{
- state->cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
- state->cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1);
-}
-
-void si_pm4_inval_texture_cache(struct si_pm4_state *state)
-{
- state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
- state->cp_coher_cntl |= S_0085F0_TCL1_ACTION_ENA(1);
-}
-
-void si_pm4_free_state(struct r600_context *rctx,
+void si_pm4_free_state(struct si_context *sctx,
struct si_pm4_state *state,
unsigned idx)
{
if (state == NULL)
return;
- if (idx != ~0 && rctx->emitted.array[idx] == state) {
- rctx->emitted.array[idx] = NULL;
+ if (idx != ~0 && sctx->emitted.array[idx] == state) {
+ sctx->emitted.array[idx] = NULL;
}
for (int i = 0; i < state->nbo; ++i) {
FREE(state);
}
-struct si_pm4_state * si_pm4_alloc_state(struct r600_context *rctx)
+struct si_pm4_state * si_pm4_alloc_state(struct si_context *sctx)
{
- struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
-
- if (pm4 == NULL)
- return NULL;
-
- pm4->chip_class = rctx->b.chip_class;
-
- return pm4;
+ return CALLOC_STRUCT(si_pm4_state);
}
-uint32_t si_pm4_sync_flags(struct r600_context *rctx)
-{
- uint32_t cp_coher_cntl = 0;
-
- for (int i = 0; i < NUMBER_OF_STATES; ++i) {
- struct si_pm4_state *state = rctx->queued.array[i];
-
- if (!state || rctx->emitted.array[i] == state)
- continue;
-
- cp_coher_cntl |= state->cp_coher_cntl;
- }
- return cp_coher_cntl;
-}
-
-unsigned si_pm4_dirty_dw(struct r600_context *rctx)
+unsigned si_pm4_dirty_dw(struct si_context *sctx)
{
unsigned count = 0;
for (int i = 0; i < NUMBER_OF_STATES; ++i) {
- struct si_pm4_state *state = rctx->queued.array[i];
+ struct si_pm4_state *state = sctx->queued.array[i];
- if (!state || rctx->emitted.array[i] == state)
+ if (!state || sctx->emitted.array[i] == state)
continue;
count += state->ndw;
-#if R600_TRACE_CS
+#if SI_TRACE_CS
/* for tracing each states */
- if (rctx->screen->trace_bo) {
- count += R600_TRACE_CS_DWORDS;
+ if (sctx->screen->b.trace_bo) {
+ count += SI_TRACE_CS_DWORDS;
}
#endif
}
return count;
}
-void si_pm4_emit(struct r600_context *rctx, struct si_pm4_state *state)
+void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state)
{
- struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
+ struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
for (int i = 0; i < state->nbo; ++i) {
- r600_context_bo_reloc(&rctx->b, &rctx->b.rings.gfx, state->bo[i],
- state->bo_usage[i]);
+ r600_context_bo_reloc(&sctx->b, &sctx->b.rings.gfx, state->bo[i],
+ state->bo_usage[i], state->bo_priority[i]);
}
memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
cs->cdw += state->ndw;
-#if R600_TRACE_CS
- if (rctx->screen->trace_bo) {
- r600_trace_emit(rctx);
+#if SI_TRACE_CS
+ if (sctx->screen->b.trace_bo) {
+ si_trace_emit(sctx);
}
#endif
}
-void si_pm4_emit_dirty(struct r600_context *rctx)
+void si_pm4_emit_dirty(struct si_context *sctx)
{
for (int i = 0; i < NUMBER_OF_STATES; ++i) {
- struct si_pm4_state *state = rctx->queued.array[i];
+ struct si_pm4_state *state = sctx->queued.array[i];
- if (!state || rctx->emitted.array[i] == state)
+ if (!state || sctx->emitted.array[i] == state)
continue;
- assert(state != rctx->queued.named.init);
- si_pm4_emit(rctx, state);
- rctx->emitted.array[i] = state;
+ assert(state != sctx->queued.named.init);
+ si_pm4_emit(sctx, state);
+ sctx->emitted.array[i] = state;
}
}
-void si_pm4_reset_emitted(struct r600_context *rctx)
+void si_pm4_reset_emitted(struct si_context *sctx)
{
- memset(&rctx->emitted, 0, sizeof(rctx->emitted));
+ memset(&sctx->emitted, 0, sizeof(sctx->emitted));
+}
+
+void si_pm4_cleanup(struct si_context *sctx)
+{
+ for (int i = 0; i < NUMBER_OF_STATES; ++i) {
+ si_pm4_free_state(sctx, sctx->queued.array[i], i);
+ }
}
projects / mesa.git / blobdiff