radeonsi: use optimal WD settings for primitive restart on Polaris
[mesa.git] / src / gallium / drivers / radeonsi / si_pm4.c
index f16933c5f98f233967cfbcc4ba02b88e14e2a752..c3032fc45b547594d8a9905bbe5df9529c8bf812 100644 (file)
@@ -115,7 +115,7 @@ void si_pm4_free_state(struct si_context *sctx,
                       struct si_pm4_state *state,
                       unsigned idx)
 {
-       if (state == NULL)
+       if (!state)
                return;
 
        if (idx != ~0 && sctx->emitted.array[idx] == state) {
@@ -127,10 +127,10 @@ void si_pm4_free_state(struct si_context *sctx,
 
 void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state)
 {
-       struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
+       struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
 
        for (int i = 0; i < state->nbo; ++i) {
-               radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx, state->bo[i],
+               radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, state->bo[i],
                                      state->bo_usage[i], state->bo_priority[i]);
        }
 
@@ -139,7 +139,7 @@ void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state)
        } else {
                struct r600_resource *ib = state->indirect_buffer;
 
-               radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx, ib,
+               radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, ib,
                                          RADEON_USAGE_READ,
                                           RADEON_PRIO_IB2);