radeonsi/gfx10: move s_sendmsg gs_alloc_req to the beginning of shaders

[mesa.git] / src / gallium / drivers / radeonsi / si_pm4.h

diff --git a/src/gallium/drivers/radeonsi/si_pm4.h b/src/gallium/drivers/radeonsi/si_pm4.h
index 5bd177332ebc817e5f84544887bd5af45f81f89b..c91a90bc638bfbe4f4b3ca3cc1db93c9530d97ca 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pm4.h
+++ b/src/gallium/drivers/radeonsi/si_pm4.h
@@ -1,5 +1,6 @@
 /*
  * Copyright 2012 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -32,10 +33,17 @@
 // forward defines
 struct si_context;
 
+/* State atoms are callbacks which write a sequence of packets into a GPU
+ * command buffer (AKA indirect buffer, AKA IB, AKA command stream, AKA CS).
+ */
+struct si_atom {
+       void (*emit)(struct si_context *ctx);
+};
+
 struct si_pm4_state
 {
        /* optional indirect buffer */
-       struct r600_resource    *indirect_buffer;
+       struct si_resource      *indirect_buffer;
 
        /* PKT3_SET_*_REG handling */
        unsigned        last_opcode;
@@ -48,9 +56,13 @@ struct si_pm4_state
 
        /* BO's referenced by this state */
        unsigned                nbo;
-       struct r600_resource    *bo[SI_PM4_MAX_BO];
+       struct si_resource      *bo[SI_PM4_MAX_BO];
        enum radeon_bo_usage    bo_usage[SI_PM4_MAX_BO];
        enum radeon_bo_priority bo_priority[SI_PM4_MAX_BO];
+
+       /* For shader states only */
+       struct si_shader *shader;
+       struct si_atom atom;
 };
 
 void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode);
@@ -59,7 +71,7 @@ void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate);
 
 void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val);
 void si_pm4_add_bo(struct si_pm4_state *state,
-                  struct r600_resource *bo,
+                  struct si_resource *bo,
                   enum radeon_bo_usage usage,
                   enum radeon_bo_priority priority);
 void si_pm4_upload_indirect_buffer(struct si_context *sctx,