}
}
-void si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader,
- struct pipe_debug_callback *debug, unsigned processor)
+void si_shader_binary_read(struct si_screen *sscreen,
+ struct radeon_shader_binary *binary,
+ struct si_shader_config *conf,
+ struct pipe_debug_callback *debug,
+ unsigned processor)
{
- const struct radeon_shader_binary *binary = &shader->binary;
-
- si_shader_binary_read_config(&shader->binary, &shader->config, 0);
+ si_shader_binary_read_config(binary, conf, 0);
if (r600_can_dump_shader(&sscreen->b, processor)) {
if (!(sscreen->b.debug_flags & DBG_NO_ASM))
fprintf(stderr, "*** SHADER STATS ***\n"
"SGPRS: %d\nVGPRS: %d\nCode Size: %d bytes\nLDS: %d blocks\n"
"Scratch: %d bytes per wave\n********************\n",
- shader->config.num_sgprs, shader->config.num_vgprs, binary->code_size,
- shader->config.lds_size, shader->config.scratch_bytes_per_wave);
+ conf->num_sgprs, conf->num_vgprs, binary->code_size,
+ conf->lds_size, conf->scratch_bytes_per_wave);
}
pipe_debug_message(debug, SHADER_INFO,
"Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d LDS: %d Scratch: %d",
- shader->config.num_sgprs, shader->config.num_vgprs,
- binary->code_size, shader->config.lds_size,
- shader->config.scratch_bytes_per_wave);
+ conf->num_sgprs, conf->num_vgprs, binary->code_size,
+ conf->lds_size, conf->scratch_bytes_per_wave);
}
int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
return r;
}
- si_shader_binary_read(sscreen, shader, debug, processor);
-
- r = si_shader_binary_upload(sscreen, shader);
- if (r)
- return r;
+ si_shader_binary_read(sscreen, &shader->binary, &shader->config,
+ debug, processor);
FREE(shader->binary.config);
- FREE(shader->binary.rodata);
FREE(shader->binary.global_symbol_offsets);
- if (shader->config.scratch_bytes_per_wave == 0) {
- FREE(shader->binary.code);
- FREE(shader->binary.relocs);
- memset(&shader->binary, 0,
- offsetof(struct radeon_shader_binary, disasm_string));
- }
+ shader->binary.config = NULL;
+ shader->binary.global_symbol_offsets = NULL;
return r;
}
r = si_compile_llvm(sscreen, si_shader_ctx->shader,
si_shader_ctx->tm, bld_base->base.gallivm->module,
debug, TGSI_PROCESSOR_GEOMETRY);
+ if (!r)
+ r = si_shader_binary_upload(sscreen, si_shader_ctx->shader);
radeon_llvm_dispose(&si_shader_ctx->radeon_bld);
goto out;
}
+ r = si_shader_binary_upload(sscreen, shader);
+ if (r) {
+ fprintf(stderr, "LLVM failed to upload shader\n");
+ goto out;
+ }
+
radeon_llvm_dispose(&si_shader_ctx.radeon_bld);
if (si_shader_ctx.type == TGSI_PROCESSOR_GEOMETRY) {
r600_resource_reference(&shader->bo, NULL);
FREE(shader->binary.code);
+ FREE(shader->binary.rodata);
FREE(shader->binary.relocs);
FREE(shader->binary.disasm_string);
}