if (ctx->shader->key.mono.u.ff_tcs_inputs_to_copy)
return si_unpack_param(ctx, ctx->tcs_out_lds_layout, 0, 13);
- const struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ const struct si_shader_info *info = &ctx->shader->selector->info;
unsigned tcs_out_vertices = info->properties[TGSI_PROPERTY_TCS_VERTICES_OUT];
unsigned vertex_dw_stride = get_tcs_out_vertex_dw_stride_constant(ctx);
unsigned num_patch_outputs = util_last_bit64(ctx->shader->selector->patch_outputs_written);
unsigned input_index,
LLVMValueRef out[4])
{
- const struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ const struct si_shader_info *info = &ctx->shader->selector->info;
unsigned vs_blit_property = info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
if (vs_blit_property) {
return;
}
+ unsigned num_vbos_in_user_sgprs = ctx->shader->selector->num_vbos_in_user_sgprs;
union si_vs_fix_fetch fix_fetch;
- LLVMValueRef t_list_ptr;
- LLVMValueRef t_offset;
- LLVMValueRef t_list;
+ LLVMValueRef vb_desc;
LLVMValueRef vertex_index;
LLVMValueRef tmp;
- /* Load the T list */
- t_list_ptr = ac_get_arg(&ctx->ac, ctx->vertex_buffers);
-
- t_offset = LLVMConstInt(ctx->i32, input_index, 0);
-
- t_list = ac_build_load_to_sgpr(&ctx->ac, t_list_ptr, t_offset);
+ if (input_index < num_vbos_in_user_sgprs) {
+ vb_desc = ac_get_arg(&ctx->ac, ctx->vb_descriptors[input_index]);
+ } else {
+ unsigned index= input_index - num_vbos_in_user_sgprs;
+ vb_desc = ac_build_load_to_sgpr(&ctx->ac,
+ ac_get_arg(&ctx->ac, ctx->vertex_buffers),
+ LLVMConstInt(ctx->i32, index, 0));
+ }
vertex_index = LLVMGetParam(ctx->main_fn,
ctx->vertex_index0.arg_index +
tmp = ac_build_opencoded_load_format(
&ctx->ac, fix_fetch.u.log_size, fix_fetch.u.num_channels_m1 + 1,
fix_fetch.u.format, fix_fetch.u.reverse, !opencode,
- t_list, vertex_index, ctx->ac.i32_0, ctx->ac.i32_0, 0, true);
+ vb_desc, vertex_index, ctx->ac.i32_0, ctx->ac.i32_0, 0, true);
for (unsigned i = 0; i < 4; ++i)
out[i] = LLVMBuildExtractElement(ctx->ac.builder, tmp, LLVMConstInt(ctx->i32, i, false), "");
return;
for (unsigned i = 0; i < num_fetches; ++i) {
LLVMValueRef voffset = LLVMConstInt(ctx->i32, fetch_stride * i, 0);
- fetches[i] = ac_build_buffer_load_format(&ctx->ac, t_list, vertex_index, voffset,
+ fetches[i] = ac_build_buffer_load_format(&ctx->ac, vb_desc, vertex_index, voffset,
channels_per_fetch, 0, true);
}
return base_addr;
}
-/* This is a generic helper that can be shared by the NIR and TGSI backends */
static LLVMValueRef get_tcs_tes_buffer_address_from_generic_indices(
struct si_shader_context *ctx,
LLVMValueRef vertex_index,
bool load_input)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ struct si_shader_info *info = &ctx->shader->selector->info;
LLVMValueRef dw_addr, stride;
ubyte name, index;
bool load_input)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ struct si_shader_info *info = &ctx->shader->selector->info;
LLVMValueRef base, addr;
driver_location = driver_location / 4;
/* TODO: This will generate rather ordinary llvm code, although it
* should be easy for the optimiser to fix up. In future we might want
- * to refactor buffer_load(), but for now this maximises code sharing
- * between the NIR and TGSI backends.
+ * to refactor buffer_load().
*/
LLVMValueRef value[4];
for (unsigned i = 0; i < num_components; i++) {
unsigned writemask)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ struct si_shader_info *info = &ctx->shader->selector->info;
const unsigned component = var->data.location_frac;
unsigned driver_location = var->data.driver_location;
LLVMValueRef dw_addr, stride;
name == TGSI_SEMANTIC_TESSOUTER) {
/* The epilog doesn't read LDS if invocation 0 defines tess factors. */
skip_lds_store = !info->reads_tessfactor_outputs &&
- ctx->shader->selector->tcs_info.tessfactors_are_def_in_all_invocs;
+ ctx->shader->selector->info.tessfactors_are_def_in_all_invocs;
is_tess_factor = true;
is_tess_inner = name == TGSI_SEMANTIC_TESSINNER;
}
/* Write tess factors into VGPRs for the epilog. */
if (is_tess_factor &&
- ctx->shader->selector->tcs_info.tessfactors_are_def_in_all_invocs) {
+ ctx->shader->selector->info.tessfactors_are_def_in_all_invocs) {
if (!is_tess_inner) {
LLVMBuildStore(ctx->ac.builder, value, /* outer */
ctx->invoc0_tess_factors[chan]);
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct si_shader *shader = ctx->shader;
LLVMValueRef vtx_offset, soffset;
- struct tgsi_shader_info *info = &shader->selector->info;
+ struct si_shader_info *info = &shader->selector->info;
unsigned semantic_name = info->input_semantic_name[input_index];
unsigned semantic_index = info->input_semantic_index[input_index];
unsigned param;
LLVMValueRef desc_elems[] = {
desc0,
desc1,
- LLVMConstInt(ctx->i32, (sel->info.const_file_max[0] + 1) * 16, 0),
+ LLVMConstInt(ctx->i32, sel->info.constbuf0_num_slots * 16, 0),
LLVMConstInt(ctx->i32, rsrc3, false)
};
if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) {
/* For isolines, the hardware expects tess factors in the
- * reverse order from what GLSL / TGSI specify.
+ * reverse order from what NIR specifies.
*/
LLVMValueRef tmp = out[0];
out[0] = out[1];
ret = LLVMBuildInsertValue(builder, ret, rel_patch_id, vgpr++, "");
ret = LLVMBuildInsertValue(builder, ret, invocation_id, vgpr++, "");
- if (ctx->shader->selector->tcs_info.tessfactors_are_def_in_all_invocs) {
+ if (ctx->shader->selector->info.tessfactors_are_def_in_all_invocs) {
vgpr++; /* skip the tess factor LDS offset */
for (unsigned i = 0; i < 6; i++) {
LLVMValueRef value =
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct si_shader *shader = ctx->shader;
- struct tgsi_shader_info *info = &shader->selector->info;
+ struct si_shader_info *info = &shader->selector->info;
unsigned i, chan;
LLVMValueRef vertex_id = ac_get_arg(&ctx->ac, ctx->rel_auto_id);
LLVMValueRef vertex_dw_stride = get_tcs_in_vertex_dw_stride(ctx);
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct si_shader *es = ctx->shader;
- struct tgsi_shader_info *info = &es->selector->info;
+ struct si_shader_info *info = &es->selector->info;
LLVMValueRef lds_base = NULL;
unsigned chan;
int i;
LLVMValueRef *addrs)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- struct tgsi_shader_info UNUSED *info = &ctx->shader->selector->info;
+ struct si_shader_info UNUSED *info = &ctx->shader->selector->info;
assert(info->num_outputs <= max_outputs);
LLVMValueRef *addrs)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ struct si_shader_info *info = &ctx->shader->selector->info;
struct si_shader_output_values *outputs = NULL;
int i,j;
LLVMValueRef *addrs)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ struct si_shader_info *info = &ctx->shader->selector->info;
LLVMValueRef pos[4] = {};
assert(info->num_outputs <= max_outputs);
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct si_shader *shader = ctx->shader;
- struct tgsi_shader_info *info = &shader->selector->info;
+ struct si_shader_info *info = &shader->selector->info;
LLVMBuilderRef builder = ctx->ac.builder;
unsigned i, j, first_vgpr, vgpr;
break;
case TGSI_SEMANTIC_POSITION:
depth = LLVMBuildLoad(builder,
- addrs[4 * i + 2], "");
+ addrs[4 * i + 0], "");
break;
case TGSI_SEMANTIC_STENCIL:
stencil = LLVMBuildLoad(builder,
- addrs[4 * i + 1], "");
+ addrs[4 * i + 0], "");
break;
case TGSI_SEMANTIC_SAMPLEMASK:
samplemask = LLVMBuildLoad(builder,
return;
}
- struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ struct si_shader_info *info = &ctx->shader->selector->info;
struct si_shader *shader = ctx->shader;
LLVMValueRef soffset = ac_get_arg(&ctx->ac, ctx->gs2vs_offset);
LLVMValueRef gs_next_vertex;
ac_build_s_barrier(&ctx->ac);
}
-void si_create_function(struct si_shader_context *ctx,
- const char *name,
- LLVMTypeRef *returns, unsigned num_returns,
- unsigned max_workgroup_size)
-{
- si_llvm_create_func(ctx, name, returns, num_returns);
- ctx->return_value = LLVMGetUndef(ctx->return_type);
-
- if (ctx->screen->info.address32_hi) {
- ac_llvm_add_target_dep_function_attr(ctx->main_fn,
- "amdgpu-32bit-address-high-bits",
- ctx->screen->info.address32_hi);
- }
-
- LLVMAddTargetDependentFunctionAttr(ctx->main_fn,
- "no-signed-zeros-fp-math",
- "true");
-
- ac_llvm_set_workgroup_size(ctx->main_fn, max_workgroup_size);
-}
-
static void declare_streamout_params(struct si_shader_context *ctx,
struct pipe_stream_output_info *so)
{
}
}
+static void declare_vb_descriptor_input_sgprs(struct si_shader_context *ctx)
+{
+ ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR, &ctx->vertex_buffers);
+
+ unsigned num_vbos_in_user_sgprs = ctx->shader->selector->num_vbos_in_user_sgprs;
+ if (num_vbos_in_user_sgprs) {
+ unsigned user_sgprs = ctx->args.num_sgprs_used;
+
+ if (is_merged_shader(ctx))
+ user_sgprs -= 8;
+ assert(user_sgprs <= SI_SGPR_VS_VB_DESCRIPTOR_FIRST);
+
+ /* Declare unused SGPRs to align VB descriptors to 4 SGPRs (hw requirement). */
+ for (unsigned i = user_sgprs; i < SI_SGPR_VS_VB_DESCRIPTOR_FIRST; i++)
+ ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* unused */
+
+ assert(num_vbos_in_user_sgprs <= ARRAY_SIZE(ctx->vb_descriptors));
+ for (unsigned i = 0; i < num_vbos_in_user_sgprs; i++)
+ ac_add_arg(&ctx->args, AC_ARG_SGPR, 4, AC_ARG_INT, &ctx->vb_descriptors[i]);
+ }
+}
+
static void declare_vs_input_vgprs(struct si_shader_context *ctx,
unsigned *num_prolog_vgprs)
{
static void create_function(struct si_shader_context *ctx)
{
struct si_shader *shader = ctx->shader;
- LLVMTypeRef returns[16+32*4];
+ LLVMTypeRef returns[AC_MAX_ARGS];
unsigned i, num_return_sgprs;
unsigned num_returns = 0;
unsigned num_prolog_vgprs = 0;
declare_per_stage_desc_pointers(ctx, true);
declare_vs_specific_input_sgprs(ctx);
- if (!shader->is_gs_copy_shader) {
- ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR,
- &ctx->vertex_buffers);
- }
+ if (!shader->is_gs_copy_shader)
+ declare_vb_descriptor_input_sgprs(ctx);
if (shader->key.as_es) {
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_out_lds_offsets);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_out_lds_layout);
- ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR, &ctx->vertex_buffers);
+ declare_vb_descriptor_input_sgprs(ctx);
/* VGPRs (first TCS, then VS) */
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_patch_id);
/* Declare as many input SGPRs as the VS has. */
}
- if (ctx->type == PIPE_SHADER_VERTEX) {
- ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR,
- &ctx->vertex_buffers);
- }
+ if (ctx->type == PIPE_SHADER_VERTEX)
+ declare_vb_descriptor_input_sgprs(ctx);
/* VGPRs (first GS, then VS/TES) */
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx01_offset);
&ctx->args.frag_pos[2], SI_PARAM_POS_Z_FLOAT);
add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT,
&ctx->args.frag_pos[3], SI_PARAM_POS_W_FLOAT);
+ shader->info.face_vgpr_index = ctx->args.num_vgprs_used;
add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
&ctx->args.front_face, SI_PARAM_FRONT_FACE);
- shader->info.face_vgpr_index = 20;
+ shader->info.ancillary_vgpr_index = ctx->args.num_vgprs_used;
add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
&ctx->args.ancillary, SI_PARAM_ANCILLARY);
- shader->info.ancillary_vgpr_index = 21;
add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT,
&ctx->args.sample_coverage, SI_PARAM_SAMPLE_COVERAGE);
add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
return;
}
- si_create_function(ctx, "main", returns, num_returns,
- si_get_max_workgroup_size(shader));
+ si_llvm_create_func(ctx, "main", returns, num_returns,
+ si_get_max_workgroup_size(shader));
/* Reserve register locations for VGPR inputs the PS prolog may need. */
if (ctx->type == PIPE_SHADER_FRAGMENT && !ctx->shader->is_monolithic) {
struct si_shader *shader;
LLVMBuilderRef builder;
struct si_shader_output_values outputs[SI_MAX_VS_OUTPUTS];
- struct tgsi_shader_info *gsinfo = &gs_selector->info;
+ struct si_shader_info *gsinfo = &gs_selector->info;
int i;
static void si_optimize_vs_outputs(struct si_shader_context *ctx)
{
struct si_shader *shader = ctx->shader;
- struct tgsi_shader_info *info = &shader->selector->info;
+ struct si_shader_info *info = &shader->selector->info;
if ((ctx->type != PIPE_SHADER_VERTEX &&
ctx->type != PIPE_SHADER_TESS_EVAL) ||
ac_build_kill_if_false(&ctx->ac, visible);
}
-static bool si_compile_tgsi_main(struct si_shader_context *ctx,
- struct nir_shader *nir, bool free_nir)
+static bool si_build_main_function(struct si_shader_context *ctx,
+ struct nir_shader *nir, bool free_nir)
{
struct si_shader *shader = ctx->shader;
struct si_shader_selector *sel = shader->selector;
preload_ring_buffers(ctx);
if (ctx->type == PIPE_SHADER_TESS_CTRL &&
- sel->tcs_info.tessfactors_are_def_in_all_invocs) {
+ sel->info.tessfactors_are_def_in_all_invocs) {
for (unsigned i = 0; i < 6; i++) {
ctx->invoc0_tess_factors[i] =
ac_build_alloca_undef(&ctx->ac, ctx->i32, "");
*/
if (ctx->screen->info.chip_class >= GFX9) {
if (!shader->is_monolithic &&
- sel->info.num_instructions > 1 && /* not empty shader */
(shader->key.as_es || shader->key.as_ls) &&
(ctx->type == PIPE_SHADER_TESS_EVAL ||
(ctx->type == PIPE_SHADER_VERTEX &&
* \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
* \param key Output shader part key.
*/
-static void si_get_vs_prolog_key(const struct tgsi_shader_info *info,
+static void si_get_vs_prolog_key(const struct si_shader_info *info,
unsigned num_input_sgprs,
const struct si_vs_prolog_bits *prolog_key,
struct si_shader *shader_out,
union si_shader_part_key *key,
bool separate_prolog)
{
- struct tgsi_shader_info *info = &shader->selector->info;
+ struct si_shader_info *info = &shader->selector->info;
memset(key, 0, sizeof(*key));
key->ps_prolog.states = shader->key.part.ps.prolog;
static void si_get_ps_epilog_key(struct si_shader *shader,
union si_shader_part_key *key)
{
- struct tgsi_shader_info *info = &shader->selector->info;
+ struct si_shader_info *info = &shader->selector->info;
memset(key, 0, sizeof(*key));
key->ps_epilog.colors_written = info->colors_written;
key->ps_epilog.writes_z = info->writes_z;
{
unsigned num_sgprs, num_vgprs;
LLVMBuilderRef builder = ctx->ac.builder;
- LLVMTypeRef returns[48];
+ LLVMTypeRef returns[AC_MAX_ARGS];
LLVMValueRef func, ret;
memset(&ctx->args, 0, sizeof(ctx->args));
}
/* Create the function. */
- si_create_function(ctx, "gs_prolog", returns, num_sgprs + num_vgprs,
- 0);
+ si_llvm_create_func(ctx, "gs_prolog", returns, num_sgprs + num_vgprs, 0);
func = ctx->main_fn;
/* Set the full EXEC mask for the prolog, because we are only fiddling
{
LLVMBuilderRef builder = ctx->ac.builder;
/* PS epilog has one arg per color component; gfx9 merged shader
- * prologs need to forward 32 user SGPRs.
+ * prologs need to forward 40 SGPRs.
*/
- LLVMValueRef initial[64], out[64];
+ LLVMValueRef initial[AC_MAX_ARGS], out[AC_MAX_ARGS];
LLVMTypeRef function_type;
unsigned num_first_params;
unsigned num_out, initial_num_out;
/* Prepare the return type. */
unsigned num_returns = 0;
- LLVMTypeRef returns[32], last_func_type, return_type;
+ LLVMTypeRef returns[AC_MAX_ARGS], last_func_type, return_type;
last_func_type = LLVMGetElementType(LLVMTypeOf(parts[num_parts - 1]));
return_type = LLVMGetReturnType(last_func_type);
unreachable("unexpected type");
}
- si_create_function(ctx, "wrapper", returns, num_returns,
- si_get_max_workgroup_size(ctx->shader));
+ si_llvm_create_func(ctx, "wrapper", returns, num_returns,
+ si_get_max_workgroup_size(ctx->shader));
if (is_merged_shader(ctx))
ac_init_exec_full_mask(&ctx->ac);
/* Now chain the parts. */
LLVMValueRef ret = NULL;
for (unsigned part = 0; part < num_parts; ++part) {
- LLVMValueRef in[48];
+ LLVMValueRef in[AC_MAX_ARGS];
LLVMTypeRef ret_type;
unsigned out_idx = 0;
unsigned num_params = LLVMCountParams(parts[part]);
struct nir_shader *nir = get_nir_shader(sel, &free_nir);
int r = -1;
- /* Dump TGSI code before doing TGSI->LLVM conversion in case the
+ /* Dump NIR before doing NIR->LLVM conversion in case the
* conversion fails. */
if (si_can_dump_shader(sscreen, sel->type) &&
- !(sscreen->debug_flags & DBG(NO_TGSI))) {
+ !(sscreen->debug_flags & DBG(NO_NIR))) {
nir_print_shader(nir, stderr);
si_dump_streamout(&sel->so);
}
shader->info.uses_instanceid = sel->info.uses_instanceid;
- if (!si_compile_tgsi_main(&ctx, nir, free_nir)) {
+ if (!si_build_main_function(&ctx, nir, free_nir)) {
si_llvm_dispose(&ctx);
return -1;
}
shader_ls.is_monolithic = true;
si_llvm_context_set_ir(&ctx, &shader_ls);
- if (!si_compile_tgsi_main(&ctx, nir, free_nir)) {
+ if (!si_build_main_function(&ctx, nir, free_nir)) {
si_llvm_dispose(&ctx);
return -1;
}
shader_es.is_monolithic = true;
si_llvm_context_set_ir(&ctx, &shader_es);
- if (!si_compile_tgsi_main(&ctx, nir, free_nir)) {
+ if (!si_build_main_function(&ctx, nir, free_nir)) {
si_llvm_dispose(&ctx);
return -1;
}
returns[num_returns++] = ctx->f32;
/* Create the function. */
- si_create_function(ctx, "vs_prolog", returns, num_returns, 0);
+ si_llvm_create_func(ctx, "vs_prolog", returns, num_returns, 0);
func = ctx->main_fn;
for (i = 0; i < num_input_vgprs; i++) {
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &tess_factors[i]);
/* Create the function. */
- si_create_function(ctx, "tcs_epilog", NULL, 0,
- ctx->screen->info.chip_class >= GFX7 ? 128 : 0);
+ si_llvm_create_func(ctx, "tcs_epilog", NULL, 0,
+ ctx->screen->info.chip_class >= GFX7 ? 128 : 0);
ac_declare_lds_as_pointer(&ctx->ac);
LLVMValueRef invoc0_tess_factors[6];
return_types[num_returns++] = ctx->f32;
/* Create the function. */
- si_create_function(ctx, "ps_prolog", return_types, num_returns, 0);
+ si_llvm_create_func(ctx, "ps_prolog", return_types, num_returns, 0);
func = ctx->main_fn;
/* Copy inputs to outputs. This should be no-op, as the registers match,
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT, NULL);
/* Create the function. */
- si_create_function(ctx, "ps_epilog", NULL, 0, 0);
+ si_llvm_create_func(ctx, "ps_epilog", NULL, 0, 0);
/* Disable elimination of unused inputs. */
ac_llvm_add_target_dep_function_attr(ctx->main_fn,
"InitialPSInputAddr", 0xffffff);
}
}
-bool si_shader_create(struct si_screen *sscreen, struct ac_llvm_compiler *compiler,
- struct si_shader *shader,
- struct pipe_debug_callback *debug)
+bool si_create_shader_variant(struct si_screen *sscreen,
+ struct ac_llvm_compiler *compiler,
+ struct si_shader *shader,
+ struct pipe_debug_callback *debug)
{
struct si_shader_selector *sel = shader->selector;
struct si_shader *mainp = *si_get_main_shader_part(sel, &shader->key);
if (!mainp)
return false;
- /* Copy the compiled TGSI shader data over. */
+ /* Copy the compiled shader data over. */
shader->is_binary_shared = true;
shader->binary = mainp->binary;
shader->config = mainp->config;