radeonsi: Set PIPE_SHADER_CAP_MAX_SHADER_IMAGES

[mesa.git] / src / gallium / drivers / radeonsi / si_shader.h

diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index ee81621a702e52013f4d314652e5bca8ad6d70f4..8059edf639561939c32d1853ed33ea9475c9838a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -75,10 +75,12 @@
 struct radeon_shader_binary;
 struct radeon_shader_reloc;
 
+#define SI_MAX_VS_OUTPUTS      40
+
 #define SI_SGPR_RW_BUFFERS     0  /* rings (& stream-out, VS only) */
 #define SI_SGPR_CONST_BUFFERS  2
 #define SI_SGPR_SAMPLERS       4  /* images & sampler states interleaved */
-/* TODO: gap */
+#define SI_SGPR_IMAGES         6
 #define SI_SGPR_VERTEX_BUFFERS 8  /* VS only */
 #define SI_SGPR_BASE_VERTEX    10 /* VS only */
 #define SI_SGPR_START_INSTANCE 11 /* VS only */
@@ -102,7 +104,7 @@ struct radeon_shader_reloc;
 #define SI_PARAM_RW_BUFFERS    0
 #define SI_PARAM_CONST_BUFFERS 1
 #define SI_PARAM_SAMPLERS      2
-#define SI_PARAM_UNUSED                3 /* TODO: use */
+#define SI_PARAM_IMAGES                3
 
 /* VS only parameters */
 #define SI_PARAM_VERTEX_BUFFERS        4
@@ -339,6 +341,17 @@ struct si_shader_config {
        unsigned                        rsrc2;
 };
 
+/* GCN-specific shader info. */
+struct si_shader_info {
+       ubyte                   vs_output_param_offset[SI_MAX_VS_OUTPUTS];
+       ubyte                   num_input_sgprs;
+       ubyte                   num_input_vgprs;
+       char                    face_vgpr_index;
+       bool                    uses_instanceid;
+       ubyte                   nr_pos_exports;
+       ubyte                   nr_param_exports;
+};
+
 struct si_shader {
        struct si_shader_selector       *selector;
        struct si_shader                *next_variant;
@@ -351,18 +364,13 @@ struct si_shader {
        struct r600_resource            *bo;
        struct r600_resource            *scratch_bo;
        union si_shader_key             key;
-       struct radeon_shader_binary     binary;
        bool                            is_binary_shared;
-       struct si_shader_config         config;
-
-       ubyte                   num_input_sgprs;
-       ubyte                   num_input_vgprs;
-       char                    face_vgpr_index;
+       unsigned                        z_order;
 
-       unsigned                vs_output_param_offset[PIPE_MAX_SHADER_OUTPUTS];
-       bool                    uses_instanceid;
-       unsigned                nr_pos_exports;
-       unsigned                nr_param_exports;
+       /* The following data is all that's needed for binary shaders. */
+       struct radeon_shader_binary     binary;
+       struct si_shader_config         config;
+       struct si_shader_info           info;
 };
 
 struct si_shader_part {
@@ -426,7 +434,8 @@ void si_shader_destroy(struct si_shader *shader);
 unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
 int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
 void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
-                   struct pipe_debug_callback *debug, unsigned processor);
+                   struct pipe_debug_callback *debug, unsigned processor,
+                   FILE *f);
 void si_shader_apply_scratch_relocs(struct si_context *sctx,
                        struct si_shader *shader,
                        uint64_t scratch_va);