radeonsi: pass TGSI processor type to si_compile_llvm for dumping

[mesa.git] / src / gallium / drivers / radeonsi / si_shader.h

diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 3400a03d7bb7d3c4f9226abc98bb53dfc2c94049..b50b43c23907a56e7198aedb03ccf4cdca97e6a5 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -76,10 +76,10 @@ struct radeon_shader_binary;
 struct radeon_shader_reloc;
 
 #define SI_SGPR_RW_BUFFERS     0  /* rings (& stream-out, VS only) */
-#define SI_SGPR_CONST          2
-#define SI_SGPR_SAMPLER                4
-#define SI_SGPR_RESOURCE       6
-#define SI_SGPR_VERTEX_BUFFER  8  /* VS only */
+#define SI_SGPR_CONST_BUFFERS  2
+#define SI_SGPR_SAMPLER_STATES 4
+#define SI_SGPR_SAMPLER_VIEWS  6
+#define SI_SGPR_VERTEX_BUFFERS 8  /* VS only */
 #define SI_SGPR_BASE_VERTEX    10 /* VS only */
 #define SI_SGPR_START_INSTANCE 11 /* VS only */
 #define SI_SGPR_VS_STATE_BITS  12 /* VS(VS) only */
@@ -101,12 +101,12 @@ struct radeon_shader_reloc;
 
 /* LLVM function parameter indices */
 #define SI_PARAM_RW_BUFFERS    0
-#define SI_PARAM_CONST         1
-#define SI_PARAM_SAMPLER       2
-#define SI_PARAM_RESOURCE      3
+#define SI_PARAM_CONST_BUFFERS 1
+#define SI_PARAM_SAMPLER_STATES        2
+#define SI_PARAM_SAMPLER_VIEWS 3
 
 /* VS only parameters */
-#define SI_PARAM_VERTEX_BUFFER 4
+#define SI_PARAM_VERTEX_BUFFERS        4
 #define SI_PARAM_BASE_VERTEX   5
 #define SI_PARAM_START_INSTANCE        6
 /* [0] = clamp vertex color */
@@ -213,7 +213,6 @@ struct si_shader_selector {
        /* masks of "get_unique_index" bits */
        uint64_t        outputs_written;
        uint32_t        patch_outputs_written;
-       uint32_t        ps_colors_written;
 };
 
 /* Valid shader configurations:
@@ -290,8 +289,8 @@ struct si_shader {
        bool                    is_gs_copy_shader;
        bool                    dx10_clamp_mode; /* convert NaNs to 0 */
 
-       unsigned                ls_rsrc1;
-       unsigned                ls_rsrc2;
+       unsigned                rsrc1;
+       unsigned                rsrc2;
 };
 
 static inline struct tgsi_shader_info *si_get_vs_info(struct si_context *sctx)
@@ -328,14 +327,17 @@ static inline bool si_vs_exports_prim_id(struct si_shader *shader)
 
 /* radeonsi_shader.c */
 int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
-                    struct si_shader *shader);
+                    struct si_shader *shader,
+                    struct pipe_debug_callback *debug);
 void si_dump_shader_key(unsigned shader, union si_shader_key *key, FILE *f);
 int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
-                   LLVMTargetMachineRef tm, LLVMModuleRef mod);
+                   LLVMTargetMachineRef tm, LLVMModuleRef mod,
+                   struct pipe_debug_callback *debug, unsigned processor);
 void si_shader_destroy(struct si_shader *shader);
 unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
 int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
-int si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader);
+int si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader,
+                         struct pipe_debug_callback *debug);
 void si_shader_apply_scratch_relocs(struct si_context *sctx,
                        struct si_shader *shader,
                        uint64_t scratch_va);