radeonsi: move VS_STATE.LS_OUT_PATCH_SIZE a few bits higher to make space there
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_llvm.c
index df33d34076e1fa13f147c4c6c221275b5a0017ab..11f5a14d121a9bd672b52c5e3fbb854ba4d571c0 100644 (file)
@@ -114,8 +114,7 @@ void si_shader_binary_clean(struct si_shader_binary *binary)
 void si_llvm_context_init(struct si_shader_context *ctx,
                          struct si_screen *sscreen,
                          struct ac_llvm_compiler *compiler,
-                         unsigned wave_size,
-                         unsigned ballot_mask_bits)
+                         unsigned wave_size)
 {
        /* Initialize the gallivm object:
         * We are only using the module, context, and builder fields of this struct.
@@ -129,7 +128,7 @@ void si_llvm_context_init(struct si_shader_context *ctx,
        ac_llvm_context_init(&ctx->ac, compiler, sscreen->info.chip_class,
                             sscreen->info.family,
                             AC_FLOAT_MODE_NO_SIGNED_ZEROS_FP_MATH,
-                            wave_size, ballot_mask_bits);
+                            wave_size, 64);
 
        ctx->voidt = LLVMVoidTypeInContext(ctx->ac.context);
        ctx->i1 = LLVMInt1TypeInContext(ctx->ac.context);
@@ -155,7 +154,7 @@ void si_llvm_context_set_ir(struct si_shader_context *ctx,
                            struct si_shader *shader)
 {
        struct si_shader_selector *sel = shader->selector;
-       const struct tgsi_shader_info *info = &sel->info;
+       const struct si_shader_info *info = &sel->info;
 
        ctx->shader = shader;
        ctx->type = sel->type;
@@ -167,9 +166,9 @@ void si_llvm_context_set_ir(struct si_shader_context *ctx,
        ctx->num_images = util_last_bit(info->images_declared);
 }
 
-void si_llvm_create_func(struct si_shader_context *ctx,
-                        const char *name,
-                        LLVMTypeRef *return_types, unsigned num_return_elems)
+void si_llvm_create_func(struct si_shader_context *ctx, const char *name,
+                        LLVMTypeRef *return_types, unsigned num_return_elems,
+                        unsigned max_workgroup_size)
 {
        LLVMTypeRef ret_type;
        enum ac_llvm_calling_convention call_conv;
@@ -217,6 +216,19 @@ void si_llvm_create_func(struct si_shader_context *ctx,
        ctx->return_type = ret_type;
        ctx->main_fn = ac_build_main(&ctx->args, &ctx->ac, call_conv, name,
                                     ret_type, ctx->ac.module);
+       ctx->return_value = LLVMGetUndef(ctx->return_type);
+
+       if (ctx->screen->info.address32_hi) {
+               ac_llvm_add_target_dep_function_attr(ctx->main_fn,
+                                                    "amdgpu-32bit-address-high-bits",
+                                                    ctx->screen->info.address32_hi);
+       }
+
+       LLVMAddTargetDependentFunctionAttr(ctx->main_fn,
+                                          "no-signed-zeros-fp-math",
+                                          "true");
+
+       ac_llvm_set_workgroup_size(ctx->main_fn, max_workgroup_size);
 }
 
 void si_llvm_optimize_module(struct si_shader_context *ctx)