static void gather_intrinsic_load_deref_input_info(const nir_shader *nir,
const nir_intrinsic_instr *instr,
const nir_deref_instr *deref,
- struct tgsi_shader_info *info)
+ struct si_shader_info *info)
{
switch (nir->info.stage) {
case MESA_SHADER_VERTEX:
static void gather_intrinsic_load_deref_output_info(const nir_shader *nir,
const nir_intrinsic_instr *instr,
nir_variable *var,
- struct tgsi_shader_info *info)
+ struct si_shader_info *info)
{
assert(var && var->data.mode == nir_var_shader_out);
static void gather_intrinsic_store_deref_output_info(const nir_shader *nir,
const nir_intrinsic_instr *instr,
const nir_deref_instr *deref,
- struct tgsi_shader_info *info)
+ struct si_shader_info *info)
{
switch (nir->info.stage) {
case MESA_SHADER_VERTEX: /* needed by LS, ES */
}
static void scan_instruction(const struct nir_shader *nir,
- struct tgsi_shader_info *info,
+ struct si_shader_info *info,
nir_instr *instr)
{
if (instr->type == nir_instr_type_alu) {
case nir_intrinsic_load_num_work_groups:
info->uses_grid_size = true;
break;
+ case nir_intrinsic_load_local_invocation_index:
+ case nir_intrinsic_load_subgroup_id:
+ case nir_intrinsic_load_num_subgroups:
+ info->uses_subgroup_info = true;
+ break;
case nir_intrinsic_load_local_group_size:
/* The block size is translated to IMM with a fixed block size. */
if (info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)
}
}
-void si_nir_scan_tess_ctrl(const struct nir_shader *nir,
- struct tgsi_tessctrl_info *out)
-{
- memset(out, 0, sizeof(*out));
-
- if (nir->info.stage != MESA_SHADER_TESS_CTRL)
- return;
-
- out->tessfactors_are_def_in_all_invocs =
- ac_are_tessfactors_def_in_all_invocs(nir);
-}
-
static void scan_output_slot(const nir_variable *var,
unsigned var_idx,
unsigned component, unsigned num_components,
- struct tgsi_shader_info *info)
+ struct si_shader_info *info)
{
assert(component + num_components <= 4);
assert(component < 4);
static void scan_output_helper(const nir_variable *var,
unsigned location,
const struct glsl_type *type,
- struct tgsi_shader_info *info)
+ struct si_shader_info *info)
{
- if (glsl_type_is_struct(type)) {
+ if (glsl_type_is_struct(type) || glsl_type_is_interface(type)) {
for (unsigned i = 0; i < glsl_get_length(type); i++) {
const struct glsl_type *ft = glsl_get_struct_field(type, i);
scan_output_helper(var, location, ft, info);
}
void si_nir_scan_shader(const struct nir_shader *nir,
- struct tgsi_shader_info *info)
+ struct si_shader_info *info)
{
nir_function *func;
unsigned i;
if (info->processor == PIPE_SHADER_FRAGMENT)
info->uses_kill = nir->info.fs.uses_discard;
+ if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
+ info->tessfactors_are_def_in_all_invocs =
+ ac_are_tessfactors_def_in_all_invocs(nir);
+ }
+
func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
nir_foreach_block(block, func->impl) {
nir_foreach_instr(instr, block)
variable->data.driver_location *= 4;
}
- nir_foreach_variable(variable, &nir->outputs) {
+ nir_foreach_variable(variable, &nir->outputs)
variable->data.driver_location *= 4;
-
- if (nir->info.stage == MESA_SHADER_FRAGMENT) {
- if (variable->data.location == FRAG_RESULT_DEPTH)
- variable->data.driver_location += 2;
- else if (variable->data.location == FRAG_RESULT_STENCIL)
- variable->data.driver_location += 1;
- }
- }
}
/**
bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
{
- struct tgsi_shader_info *info = &ctx->shader->selector->info;
+ struct si_shader_info *info = &ctx->shader->selector->info;
if (nir->info.stage == MESA_SHADER_VERTEX) {
uint64_t processed_inputs = 0;