mask <<= nir_intrinsic_component(intr);
- unsigned name, index;
- if (info->stage == MESA_SHADER_VERTEX && is_input) {
- /* VS doesn't have semantics. */
- name = 0;
- index = 0;
- } else if (info->stage == MESA_SHADER_FRAGMENT && !is_input) {
- tgsi_get_gl_frag_result_semantic(nir_intrinsic_io_semantics(intr).location,
- &name, &index);
- /* Adjust for dual source blending. */
- if (nir_intrinsic_io_semantics(intr).dual_source_blend_index)
- index++;
- } else {
- tgsi_get_gl_varying_semantic(nir_intrinsic_io_semantics(intr).location,
- true, &name, &index);
- }
-
nir_src offset = *nir_get_io_offset_src(intr);
bool indirect = !nir_src_is_const(offset);
if (!indirect)
assert(nir_src_as_uint(offset) == 0);
+ unsigned semantic = 0;
+ /* VS doesn't have semantics. */
+ if (info->stage != MESA_SHADER_VERTEX || !is_input)
+ semantic = nir_intrinsic_io_semantics(intr).location;
+
+ if (info->stage == MESA_SHADER_FRAGMENT && !is_input) {
+ /* Never use FRAG_RESULT_COLOR directly. */
+ if (semantic == FRAG_RESULT_COLOR) {
+ semantic = FRAG_RESULT_DATA0;
+ info->properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] = true;
+ }
+ semantic += nir_intrinsic_io_semantics(intr).dual_source_blend_index;
+ }
+
unsigned driver_location = nir_intrinsic_base(intr);
unsigned num_slots = indirect ? nir_intrinsic_io_semantics(intr).num_slots : (1 + dual_slot);
unsigned loc = driver_location + i;
unsigned slot_mask = (dual_slot && i % 2 ? mask >> 4 : mask) & 0xf;
- info->input_semantic_name[loc] = name;
- info->input_semantic_index[loc] = index + i;
+ info->input_semantic[loc] = semantic + i;
info->input_interpolate[loc] = interp;
if (slot_mask) {
info->input_usage_mask[loc] |= slot_mask;
info->num_inputs = MAX2(info->num_inputs, loc + 1);
- if (name == TGSI_SEMANTIC_PRIMID)
+ if (semantic == VARYING_SLOT_PRIMITIVE_ID)
info->uses_primid = true;
}
}
} else {
/* Outputs. */
assert(driver_location + num_slots <= ARRAY_SIZE(info->output_usagemask));
+ assert(semantic + num_slots < ARRAY_SIZE(info->output_semantic_to_slot));
for (unsigned i = 0; i < num_slots; i++) {
unsigned loc = driver_location + i;
unsigned slot_mask = (dual_slot && i % 2 ? mask >> 4 : mask) & 0xf;
- info->output_semantic_name[loc] = name;
- info->output_semantic_index[loc] = index + i;
+ info->output_semantic[loc] = semantic + i;
+ info->output_semantic_to_slot[semantic + i] = loc;
if (is_output_load) {
/* Output loads have only a few things that we need to track. */
info->output_usagemask[loc] |= slot_mask;
info->num_outputs = MAX2(info->num_outputs, loc + 1);
- switch (name) {
- case TGSI_SEMANTIC_PRIMID:
- info->writes_primid = true;
- break;
- case TGSI_SEMANTIC_VIEWPORT_INDEX:
- info->writes_viewport_index = true;
- break;
- case TGSI_SEMANTIC_LAYER:
- info->writes_layer = true;
- break;
- case TGSI_SEMANTIC_PSIZE:
- info->writes_psize = true;
- break;
- case TGSI_SEMANTIC_CLIPVERTEX:
- info->writes_clipvertex = true;
- break;
- case TGSI_SEMANTIC_COLOR:
- info->colors_written |= 1 << (index + i);
-
- if (info->stage == MESA_SHADER_FRAGMENT &&
- nir_intrinsic_io_semantics(intr).location == FRAG_RESULT_COLOR)
- info->properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] = true;
- break;
- case TGSI_SEMANTIC_STENCIL:
- info->writes_stencil = true;
- break;
- case TGSI_SEMANTIC_SAMPLEMASK:
- info->writes_samplemask = true;
- break;
- case TGSI_SEMANTIC_EDGEFLAG:
- info->writes_edgeflag = true;
- break;
- case TGSI_SEMANTIC_POSITION:
- if (info->stage == MESA_SHADER_FRAGMENT)
+ if (info->stage == MESA_SHADER_FRAGMENT) {
+ switch (semantic) {
+ case FRAG_RESULT_DEPTH:
info->writes_z = true;
- else
+ break;
+ case FRAG_RESULT_STENCIL:
+ info->writes_stencil = true;
+ break;
+ case FRAG_RESULT_SAMPLE_MASK:
+ info->writes_samplemask = true;
+ break;
+ default:
+ if (semantic >= FRAG_RESULT_DATA0 && semantic <= FRAG_RESULT_DATA7) {
+ unsigned index = semantic - FRAG_RESULT_DATA0;
+ info->colors_written |= 1 << (index + i);
+ }
+ break;
+ }
+ } else {
+ switch (semantic) {
+ case VARYING_SLOT_PRIMITIVE_ID:
+ info->writes_primid = true;
+ break;
+ case VARYING_SLOT_VIEWPORT:
+ info->writes_viewport_index = true;
+ break;
+ case VARYING_SLOT_LAYER:
+ info->writes_layer = true;
+ break;
+ case VARYING_SLOT_PSIZ:
+ info->writes_psize = true;
+ break;
+ case VARYING_SLOT_CLIP_VERTEX:
+ info->writes_clipvertex = true;
+ break;
+ case VARYING_SLOT_EDGE:
+ info->writes_edgeflag = true;
+ break;
+ case VARYING_SLOT_POS:
info->writes_position = true;
- break;
+ break;
+ }
}
}
}
{
nir_function *func;
+ info->base = nir->info;
info->stage = nir->info.stage;
- info->properties[TGSI_PROPERTY_NEXT_SHADER] = pipe_shader_type_from_mesa(nir->info.next_stage);
-
- if (nir->info.stage == MESA_SHADER_VERTEX) {
- info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION] = nir->info.vs.window_space_position;
- info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD] = nir->info.vs.blit_sgprs_amd;
- }
-
- if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
- info->properties[TGSI_PROPERTY_TCS_VERTICES_OUT] = nir->info.tess.tcs_vertices_out;
- }
if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
- if (nir->info.tess.primitive_mode == GL_ISOLINES)
- info->properties[TGSI_PROPERTY_TES_PRIM_MODE] = PIPE_PRIM_LINES;
- else
- info->properties[TGSI_PROPERTY_TES_PRIM_MODE] = nir->info.tess.primitive_mode;
-
- STATIC_ASSERT((TESS_SPACING_EQUAL + 1) % 3 == PIPE_TESS_SPACING_EQUAL);
- STATIC_ASSERT((TESS_SPACING_FRACTIONAL_ODD + 1) % 3 == PIPE_TESS_SPACING_FRACTIONAL_ODD);
- STATIC_ASSERT((TESS_SPACING_FRACTIONAL_EVEN + 1) % 3 == PIPE_TESS_SPACING_FRACTIONAL_EVEN);
-
- info->properties[TGSI_PROPERTY_TES_SPACING] = (nir->info.tess.spacing + 1) % 3;
- info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW] = !nir->info.tess.ccw;
- info->properties[TGSI_PROPERTY_TES_POINT_MODE] = nir->info.tess.point_mode;
+ if (info->base.tess.primitive_mode == GL_ISOLINES)
+ info->base.tess.primitive_mode = GL_LINES;
}
if (nir->info.stage == MESA_SHADER_GEOMETRY) {
info->tessfactors_are_def_in_all_invocs = ac_are_tessfactors_def_in_all_invocs(nir);
}
+ memset(info->output_semantic_to_slot, -1, sizeof(info->output_semantic_to_slot));
+
func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
nir_foreach_block (block, func->impl) {
nir_foreach_instr (instr, block)
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
for (unsigned i = 0; i < 2; i++) {
if ((info->colors_read >> (i * 4)) & 0xf) {
- info->input_semantic_name[info->num_inputs] = TGSI_SEMANTIC_COLOR;
- info->input_semantic_index[info->num_inputs] = i;
+ info->input_semantic[info->num_inputs] = VARYING_SLOT_COL0 + i;
info->input_interpolate[info->num_inputs] = info->color_interpolate[i];
info->input_usage_mask[info->num_inputs] = info->colors_read >> (i * 4);
info->num_inputs++;
assert(lower_flrp);
bool lower_flrp_progress = false;
- NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp, lower_flrp, false /* always_precise */,
- nir->options->lower_ffma);
+ NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp, lower_flrp, false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, nir, nir_opt_constant_folding);
progress = true;
projects / mesa.git / blobdiff