radeonsi: prepare for driver-specific driconf options

[mesa.git] / src / gallium / drivers / radeonsi / si_shader_nir.c

diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index d9893bca564014571d7b6b7129b575f0224003a7..fce759b003d8492c2196fcdee8397359fd7d6a27 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -32,6 +32,12 @@
 #include "compiler/nir_types.h"
 
 
+static int
+type_size(const struct glsl_type *type)
+{
+   return glsl_count_attribute_slots(type, false);
+}
+
 static void scan_instruction(struct tgsi_shader_info *info,
                             nir_instr *instr)
 {
@@ -313,6 +319,82 @@ void si_nir_scan_shader(const struct nir_shader *nir,
        }
 }
 
+/**
+ * Perform "lowering" operations on the NIR that are run once when the shader
+ * selector is created.
+ */
+void
+si_lower_nir(struct si_shader_selector* sel)
+{
+       /* Adjust the driver location of inputs and outputs. The state tracker
+        * interprets them as slots, while the ac/nir backend interprets them
+        * as individual components.
+        */
+       nir_foreach_variable(variable, &sel->nir->inputs)
+               variable->data.driver_location *= 4;
+
+       nir_foreach_variable(variable, &sel->nir->outputs) {
+               variable->data.driver_location *= 4;
+
+               if (sel->nir->stage == MESA_SHADER_FRAGMENT) {
+                       if (variable->data.location == FRAG_RESULT_DEPTH)
+                               variable->data.driver_location += 2;
+                       else if (variable->data.location == FRAG_RESULT_STENCIL)
+                               variable->data.driver_location += 1;
+               }
+       }
+
+       /* Perform lowerings (and optimizations) of code.
+        *
+        * Performance considerations aside, we must:
+        * - lower certain ALU operations
+        * - ensure constant offsets for texture instructions are folded
+        *   and copy-propagated
+        */
+       NIR_PASS_V(sel->nir, nir_lower_io, nir_var_uniform, type_size,
+                  (nir_lower_io_options)0);
+       NIR_PASS_V(sel->nir, nir_lower_uniforms_to_ubo);
+
+       NIR_PASS_V(sel->nir, nir_lower_returns);
+       NIR_PASS_V(sel->nir, nir_lower_vars_to_ssa);
+       NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar);
+       NIR_PASS_V(sel->nir, nir_lower_phis_to_scalar);
+
+       static const struct nir_lower_tex_options lower_tex_options = {
+               .lower_txp = ~0u,
+       };
+       NIR_PASS_V(sel->nir, nir_lower_tex, &lower_tex_options);
+
+       bool progress;
+       do {
+               progress = false;
+
+               /* (Constant) copy propagation is needed for txf with offsets. */
+               NIR_PASS(progress, sel->nir, nir_copy_prop);
+               NIR_PASS(progress, sel->nir, nir_opt_remove_phis);
+               NIR_PASS(progress, sel->nir, nir_opt_dce);
+               if (nir_opt_trivial_continues(sel->nir)) {
+                       progress = true;
+                       NIR_PASS(progress, sel->nir, nir_copy_prop);
+                       NIR_PASS(progress, sel->nir, nir_opt_dce);
+               }
+               NIR_PASS(progress, sel->nir, nir_opt_if);
+               NIR_PASS(progress, sel->nir, nir_opt_dead_cf);
+               NIR_PASS(progress, sel->nir, nir_opt_cse);
+               NIR_PASS(progress, sel->nir, nir_opt_peephole_select, 8);
+
+               /* Needed for algebraic lowering */
+               NIR_PASS(progress, sel->nir, nir_opt_algebraic);
+               NIR_PASS(progress, sel->nir, nir_opt_constant_folding);
+
+               NIR_PASS(progress, sel->nir, nir_opt_undef);
+               NIR_PASS(progress, sel->nir, nir_opt_conditional_discard);
+               if (sel->nir->options->max_unroll_iterations) {
+                       NIR_PASS(progress, sel->nir, nir_opt_loop_unroll, 0);
+               }
+       } while (progress);
+}
+
 static void declare_nir_input_vs(struct si_shader_context *ctx,
                                 struct nir_variable *variable, unsigned rel,
                                 LLVMValueRef out[4])
@@ -363,6 +445,21 @@ si_nir_load_sampler_desc(struct ac_shader_abi *abi,
                             LLVMConstInt(ctx->ac.i32, base_index + constant_index, false),
                             "");
 
+       if (image) {
+               assert(desc_type == AC_DESC_IMAGE || desc_type == AC_DESC_BUFFER);
+               assert(base_index + constant_index < ctx->num_images);
+
+               if (dynamic_index)
+                       index = si_llvm_bound_index(ctx, index, ctx->num_images);
+
+               index = LLVMBuildSub(ctx->gallivm.builder,
+                                    LLVMConstInt(ctx->i32, SI_NUM_IMAGES - 1, 0),
+                                    index, "");
+
+               /* TODO: be smarter about when we use dcc_off */
+               return si_load_image_desc(ctx, list, index, desc_type, write);
+       }
+
        assert(base_index + constant_index < ctx->num_samplers);
 
        if (dynamic_index)