radeonsi: set AC_FUNC_ATTR_READNONE for image opcodes where it was missing
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_tgsi_mem.c
index e4b29c675a526ce9d15eb7cb33f38b71b0b5c80e..ed67976b42119611b937dbb83a95568ed3e7f13b 100644 (file)
@@ -176,23 +176,26 @@ static LLVMValueRef force_dcc_off(struct si_shader_context *ctx,
 
 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
                                LLVMValueRef list, LLVMValueRef index,
-                               enum ac_descriptor_type desc_type, bool dcc_off)
+                               enum ac_descriptor_type desc_type, bool dcc_off,
+                               bool bindless)
 {
        LLVMBuilderRef builder = ctx->ac.builder;
        LLVMValueRef rsrc;
 
        if (desc_type == AC_DESC_BUFFER) {
-               index = LLVMBuildMul(builder, index,
-                                    LLVMConstInt(ctx->i32, 2, 0), "");
-               index = LLVMBuildAdd(builder, index,
-                                    ctx->i32_1, "");
+               index = ac_build_imad(&ctx->ac, index, LLVMConstInt(ctx->i32, 2, 0),
+                                     ctx->i32_1);
                list = LLVMBuildPointerCast(builder, list,
                                            ac_array_in_const32_addr_space(ctx->v4i32), "");
        } else {
                assert(desc_type == AC_DESC_IMAGE);
        }
 
-       rsrc = ac_build_load_to_sgpr(&ctx->ac, list, index);
+       if (bindless)
+               rsrc = ac_build_load_to_sgpr_uint_wraparound(&ctx->ac, list, index);
+       else
+               rsrc = ac_build_load_to_sgpr(&ctx->ac, list, index);
+
        if (desc_type == AC_DESC_IMAGE && dcc_off)
                rsrc = force_dcc_off(ctx, rsrc);
        return rsrc;
@@ -242,6 +245,8 @@ image_fetch_rsrc(
                                     index, "");
        }
 
+       bool bindless = false;
+
        if (image->Register.File != TGSI_FILE_IMAGE) {
                /* Bindless descriptors are accessible from a different pair of
                 * user SGPR indices.
@@ -256,11 +261,12 @@ image_fetch_rsrc(
                 */
                index = LLVMBuildMul(ctx->ac.builder, index,
                                     LLVMConstInt(ctx->i32, 2, 0), "");
+               bindless = true;
        }
 
        *rsrc = si_load_image_desc(ctx, rsrc_ptr, index,
                                   target == TGSI_TEXTURE_BUFFER ? AC_DESC_BUFFER : AC_DESC_IMAGE,
-                                  dcc_off);
+                                  dcc_off, bindless);
 }
 
 static void image_fetch_coords(
@@ -313,38 +319,6 @@ static void image_fetch_coords(
        }
 }
 
-/**
- * Append the resource and indexing arguments for buffer intrinsics.
- *
- * \param rsrc the v4i32 buffer resource
- * \param index index into the buffer (stride-based)
- * \param offset byte offset into the buffer
- */
-static void buffer_append_args(
-               struct si_shader_context *ctx,
-               struct lp_build_emit_data *emit_data,
-               LLVMValueRef rsrc,
-               LLVMValueRef index,
-               LLVMValueRef offset,
-               bool atomic,
-               bool force_glc)
-{
-       const struct tgsi_full_instruction *inst = emit_data->inst;
-       LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
-       LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
-
-       emit_data->args[emit_data->arg_count++] = rsrc;
-       emit_data->args[emit_data->arg_count++] = index; /* vindex */
-       emit_data->args[emit_data->arg_count++] = offset; /* voffset */
-       if (!atomic) {
-               emit_data->args[emit_data->arg_count++] =
-                       force_glc ||
-                       inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE) ?
-                       i1true : i1false; /* glc */
-       }
-       emit_data->args[emit_data->arg_count++] = i1false; /* slc */
-}
-
 static unsigned get_cache_policy(struct si_shader_context *ctx,
                                 const struct tgsi_full_instruction *inst,
                                 bool atomic, bool may_store_unaligned,
@@ -365,39 +339,10 @@ static unsigned get_cache_policy(struct si_shader_context *ctx,
             inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE)))
                cache_policy |= ac_glc;
 
-       return cache_policy;
-}
-
-static void load_emit_buffer(struct si_shader_context *ctx,
-                            struct lp_build_emit_data *emit_data,
-                            bool can_speculate, bool allow_smem)
-{
-       const struct tgsi_full_instruction *inst = emit_data->inst;
-       uint writemask = inst->Dst[0].Register.WriteMask;
-       uint count = util_last_bit(writemask);
-       LLVMValueRef *args = emit_data->args;
-
-       /* Don't use SMEM for shader buffer loads, because LLVM doesn't
-        * select SMEM for SI.load.const with a non-constant offset, and
-        * constant offsets practically don't exist with shader buffers.
-        *
-        * Also, SI.load.const doesn't use inst_offset when it's lowered
-        * to VMEM, so we just end up with more VALU instructions in the end
-        * and no benefit.
-        *
-        * TODO: Remove this line once LLVM can select SMEM with a non-constant
-        *       offset, and can derive inst_offset when VMEM is selected.
-        *       After that, si_memory_barrier should invalidate sL1 for shader
-        *       buffers.
-        */
+       if (inst->Memory.Qualifier & TGSI_MEMORY_STREAM_CACHE_POLICY)
+               cache_policy |= ac_slc;
 
-       assert(LLVMConstIntGetZExtValue(args[1]) == 0); /* vindex */
-       emit_data->output[emit_data->chan] =
-               ac_build_buffer_load(&ctx->ac, args[0], count, NULL,
-                                    args[2], NULL, 0,
-                                    LLVMConstIntGetZExtValue(args[3]),
-                                    LLVMConstIntGetZExtValue(args[4]),
-                                    can_speculate, allow_smem);
+       return cache_policy;
 }
 
 static LLVMValueRef get_memory_ptr(struct si_shader_context *ctx,
@@ -451,20 +396,53 @@ static void load_emit_memory(
  *     For LOAD, set this to (store | atomic) slot usage in the shader.
  *     For STORE, set this to (load | atomic) slot usage in the shader.
  * \param images_reverse_access_mask  Same as above, but for images.
+ * \param bindless_buffer_reverse_access_mask  Same as above, but for bindless image buffers.
+ * \param bindless_image_reverse_access_mask   Same as above, but for bindless images.
  */
 static bool is_oneway_access_only(const struct tgsi_full_instruction *inst,
                                  const struct tgsi_shader_info *info,
                                  unsigned shader_buffers_reverse_access_mask,
-                                 unsigned images_reverse_access_mask)
+                                 unsigned images_reverse_access_mask,
+                                 bool bindless_buffer_reverse_access_mask,
+                                 bool bindless_image_reverse_access_mask)
 {
+       enum tgsi_file_type resource_file;
+       unsigned resource_index;
+       bool resource_indirect;
+
+       if (inst->Instruction.Opcode == TGSI_OPCODE_STORE) {
+               resource_file = inst->Dst[0].Register.File;
+               resource_index = inst->Dst[0].Register.Index;
+               resource_indirect = inst->Dst[0].Register.Indirect;
+       } else {
+               resource_file = inst->Src[0].Register.File;
+               resource_index = inst->Src[0].Register.Index;
+               resource_indirect = inst->Src[0].Register.Indirect;
+       }
+
+       assert(resource_file == TGSI_FILE_BUFFER ||
+              resource_file == TGSI_FILE_IMAGE ||
+              /* bindless image */
+              resource_file == TGSI_FILE_INPUT ||
+              resource_file == TGSI_FILE_OUTPUT ||
+              resource_file == TGSI_FILE_CONSTANT ||
+              resource_file == TGSI_FILE_TEMPORARY ||
+              resource_file == TGSI_FILE_IMMEDIATE);
+
+       assert(resource_file != TGSI_FILE_BUFFER ||
+              inst->Memory.Texture == TGSI_TEXTURE_BUFFER);
+
+       bool bindless = resource_file != TGSI_FILE_BUFFER &&
+                       resource_file != TGSI_FILE_IMAGE;
+
        /* RESTRICT means NOALIAS.
         * If there are no writes, we can assume the accessed memory is read-only.
         * If there are no reads, we can assume the accessed memory is write-only.
         */
-       if (inst->Memory.Qualifier & TGSI_MEMORY_RESTRICT) {
+       if (inst->Memory.Qualifier & TGSI_MEMORY_RESTRICT && !bindless) {
                unsigned reverse_access_mask;
 
-               if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
+               if (resource_file == TGSI_FILE_BUFFER) {
                        reverse_access_mask = shader_buffers_reverse_access_mask;
                } else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
                        reverse_access_mask = info->images_buffers &
@@ -474,12 +452,12 @@ static bool is_oneway_access_only(const struct tgsi_full_instruction *inst,
                                              images_reverse_access_mask;
                }
 
-               if (inst->Src[0].Register.Indirect) {
+               if (resource_indirect) {
                        if (!reverse_access_mask)
                                return true;
                } else {
                        if (!(reverse_access_mask &
-                             (1u << inst->Src[0].Register.Index)))
+                             (1u << resource_index)))
                                return true;
                }
        }
@@ -492,15 +470,15 @@ static bool is_oneway_access_only(const struct tgsi_full_instruction *inst,
         * Same for the case when there are no writes/reads for non-buffer
         * images.
         */
-       if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
-           (inst->Memory.Texture == TGSI_TEXTURE_BUFFER &&
-            (inst->Src[0].Register.File == TGSI_FILE_IMAGE ||
-             tgsi_is_bindless_image_file(inst->Src[0].Register.File)))) {
+       if (resource_file == TGSI_FILE_BUFFER ||
+           inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
                if (!shader_buffers_reverse_access_mask &&
-                   !(info->images_buffers & images_reverse_access_mask))
+                   !(info->images_buffers & images_reverse_access_mask) &&
+                   !bindless_buffer_reverse_access_mask)
                        return true;
        } else {
-               if (!(~info->images_buffers & images_reverse_access_mask))
+               if (!(~info->images_buffers & images_reverse_access_mask) &&
+                   !bindless_image_reverse_access_mask)
                        return true;
        }
        return false;
@@ -515,6 +493,9 @@ static void load_emit(
        const struct tgsi_full_instruction * inst = emit_data->inst;
        const struct tgsi_shader_info *info = &ctx->shader->selector->info;
        bool can_speculate = false;
+       LLVMValueRef vindex = ctx->i32_0;
+       LLVMValueRef voffset = ctx->i32_0;
+       struct ac_image_args args = {};
 
        if (inst->Src[0].Register.File == TGSI_FILE_MEMORY) {
                load_emit_memory(ctx, emit_data);
@@ -523,34 +504,22 @@ static void load_emit(
 
        if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
            inst->Src[0].Register.File == TGSI_FILE_CONSTBUF) {
-               LLVMValueRef offset, tmp, rsrc;
-
                bool ubo = inst->Src[0].Register.File == TGSI_FILE_CONSTBUF;
-               rsrc = shader_buffer_fetch_rsrc(ctx, &inst->Src[0], ubo);
-
-               tmp = lp_build_emit_fetch(bld_base, inst, 1, 0);
-               offset = ac_to_integer(&ctx->ac, tmp);
-
-               buffer_append_args(ctx, emit_data, rsrc, ctx->i32_0,
-                                  offset, false, false);
-       } else if (inst->Src[0].Register.File == TGSI_FILE_IMAGE ||
-                  tgsi_is_bindless_image_file(inst->Src[0].Register.File)) {
-               LLVMValueRef rsrc;
+               args.resource = shader_buffer_fetch_rsrc(ctx, &inst->Src[0], ubo);
+               voffset = ac_to_integer(&ctx->ac, lp_build_emit_fetch(bld_base, inst, 1, 0));
+       } else {
                unsigned target = inst->Memory.Texture;
 
-               image_fetch_rsrc(bld_base, &inst->Src[0], false, target, &rsrc);
-               image_fetch_coords(bld_base, inst, 1, rsrc, &emit_data->args[1]);
-
-               if (target == TGSI_TEXTURE_BUFFER) {
-                       buffer_append_args(ctx, emit_data, rsrc, emit_data->args[1],
-                                          ctx->i32_0, false, false);
-               } else {
-                       emit_data->args[0] = rsrc;
-               }
+               image_fetch_rsrc(bld_base, &inst->Src[0], false, target, &args.resource);
+               image_fetch_coords(bld_base, inst, 1, args.resource, args.coords);
+               vindex = args.coords[0]; /* for buffers only */
        }
 
        if (inst->Src[0].Register.File == TGSI_FILE_CONSTBUF) {
-               load_emit_buffer(ctx, emit_data, true, true);
+               emit_data->output[emit_data->chan] =
+                       ac_build_buffer_load(&ctx->ac, args.resource,
+                                            util_last_bit(inst->Dst[0].Register.WriteMask),
+                                            NULL, voffset, NULL, 0, 0, 0, true, true);
                return;
        }
 
@@ -562,10 +531,34 @@ static void load_emit(
                                                info->shader_buffers_store |
                                                info->shader_buffers_atomic,
                                                info->images_store |
-                                               info->images_atomic);
+                                               info->images_atomic,
+                                               info->uses_bindless_buffer_store |
+                                               info->uses_bindless_buffer_atomic,
+                                               info->uses_bindless_image_store |
+                                               info->uses_bindless_image_atomic);
+       args.cache_policy = get_cache_policy(ctx, inst, false, false, false);
 
        if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
-               load_emit_buffer(ctx, emit_data, can_speculate, false);
+               /* Don't use SMEM for shader buffer loads, because LLVM doesn't
+                * select SMEM for SI.load.const with a non-constant offset, and
+                * constant offsets practically don't exist with shader buffers.
+                *
+                * Also, SI.load.const doesn't use inst_offset when it's lowered
+                * to VMEM, so we just end up with more VALU instructions in the end
+                * and no benefit.
+                *
+                * TODO: Remove this line once LLVM can select SMEM with a non-constant
+                *       offset, and can derive inst_offset when VMEM is selected.
+                *       After that, si_memory_barrier should invalidate sL1 for shader
+                *       buffers.
+                */
+               emit_data->output[emit_data->chan] =
+                       ac_build_buffer_load(&ctx->ac, args.resource,
+                                            util_last_bit(inst->Dst[0].Register.WriteMask),
+                                            NULL, voffset, NULL, 0,
+                                            !!(args.cache_policy & ac_glc),
+                                            !!(args.cache_policy & ac_slc),
+                                            can_speculate, false);
                return;
        }
 
@@ -573,22 +566,17 @@ static void load_emit(
                unsigned num_channels = util_last_bit(inst->Dst[0].Register.WriteMask);
                LLVMValueRef result =
                        ac_build_buffer_load_format(&ctx->ac,
-                                                   emit_data->args[0],
-                                                   emit_data->args[1],
-                                                   emit_data->args[2],
+                                                   args.resource,
+                                                   vindex,
+                                                   ctx->i32_0,
                                                    num_channels,
-                                                   LLVMConstIntGetZExtValue(emit_data->args[3]),
+                                                   !!(args.cache_policy & ac_glc),
                                                    can_speculate);
                emit_data->output[emit_data->chan] =
                        ac_build_expand_to_vec4(&ctx->ac, result, num_channels);
        } else {
-               struct ac_image_args args = {};
                args.opcode = ac_image_load;
-               args.resource = emit_data->args[0];
-               memcpy(args.coords, &emit_data->args[1], sizeof(args.coords));
                args.dim = ac_image_dim_from_tgsi_target(ctx->screen, inst->Memory.Texture);
-               if (inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE))
-                       args.cache_policy = ac_glc;
                args.attributes = ac_get_load_intr_attribs(can_speculate);
                args.dmask = 0xf;
 
@@ -612,7 +600,7 @@ static void store_emit_buffer(struct si_shader_context *ctx,
        while (writemask) {
                int start, count;
                const char *intrinsic_name;
-               LLVMValueRef data, voff, tmp;
+               LLVMValueRef data, voff;
 
                u_bit_scan_consecutive_range(&writemask, &start, &count);
 
@@ -627,21 +615,14 @@ static void store_emit_buffer(struct si_shader_context *ctx,
                        data = base_data;
                        intrinsic_name = "llvm.amdgcn.buffer.store.v4f32";
                } else if (count == 2) {
-                       LLVMTypeRef v2f32 = LLVMVectorType(ctx->f32, 2);
-
-                       tmp = LLVMBuildExtractElement(
-                               builder, base_data,
-                               LLVMConstInt(ctx->i32, start, 0), "");
-                       data = LLVMBuildInsertElement(
-                               builder, LLVMGetUndef(v2f32), tmp,
-                               ctx->i32_0, "");
-
-                       tmp = LLVMBuildExtractElement(
-                               builder, base_data,
-                               LLVMConstInt(ctx->i32, start + 1, 0), "");
-                       data = LLVMBuildInsertElement(
-                               builder, data, tmp, ctx->i32_1, "");
-
+                       LLVMValueRef values[2] = {
+                               LLVMBuildExtractElement(builder, base_data,
+                                                       LLVMConstInt(ctx->i32, start, 0), ""),
+                               LLVMBuildExtractElement(builder, base_data,
+                                                       LLVMConstInt(ctx->i32, start + 1, 0), ""),
+                       };
+
+                       data = ac_build_gather_values(&ctx->ac, values, 2);
                        intrinsic_name = "llvm.amdgcn.buffer.store.v2f32";
                } else {
                        assert(count == 1);
@@ -705,42 +686,42 @@ static void store_emit(
        struct tgsi_full_src_register resource_reg =
                tgsi_full_src_register_from_dst(&inst->Dst[0]);
        unsigned target = inst->Memory.Texture;
+
+       if (inst->Dst[0].Register.File == TGSI_FILE_MEMORY) {
+               store_emit_memory(ctx, emit_data);
+               return;
+       }
+
        bool writeonly_memory = is_oneway_access_only(inst, info,
                                                      info->shader_buffers_load |
                                                      info->shader_buffers_atomic,
                                                      info->images_load |
-                                                     info->images_atomic);
-       bool is_image = inst->Dst[0].Register.File == TGSI_FILE_IMAGE ||
-                       tgsi_is_bindless_image_file(inst->Dst[0].Register.File);
-       LLVMValueRef chans[4], value;
+                                                     info->images_atomic,
+                                                     info->uses_bindless_buffer_load |
+                                                     info->uses_bindless_buffer_atomic,
+                                                     info->uses_bindless_image_load |
+                                                     info->uses_bindless_image_atomic);
+       LLVMValueRef chans[4];
        LLVMValueRef vindex = ctx->i32_0;
        LLVMValueRef voffset = ctx->i32_0;
        struct ac_image_args args = {};
 
-       if (inst->Dst[0].Register.File == TGSI_FILE_MEMORY) {
-               store_emit_memory(ctx, emit_data);
-               return;
-       }
-
        for (unsigned chan = 0; chan < 4; ++chan)
                chans[chan] = lp_build_emit_fetch(bld_base, inst, 1, chan);
 
-       value = ac_build_gather_values(&ctx->ac, chans, 4);
-
        if (inst->Dst[0].Register.File == TGSI_FILE_BUFFER) {
                args.resource = shader_buffer_fetch_rsrc(ctx, &resource_reg, false);
                voffset = ac_to_integer(&ctx->ac, lp_build_emit_fetch(bld_base, inst, 0, 0));
-       } else if (is_image) {
+       } else {
                image_fetch_rsrc(bld_base, &resource_reg, true, target, &args.resource);
                image_fetch_coords(bld_base, inst, 0, args.resource, args.coords);
                vindex = args.coords[0]; /* for buffers only */
-       } else {
-               unreachable("unexpected register file");
        }
 
        if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE)
                ac_build_waitcnt(&ctx->ac, VM_CNT);
 
+       bool is_image = inst->Dst[0].Register.File != TGSI_FILE_BUFFER;
        args.cache_policy = get_cache_policy(ctx, inst,
                                             false, /* atomic */
                                             is_image, /* may_store_unaligned */
@@ -748,27 +729,46 @@ static void store_emit(
 
        if (inst->Dst[0].Register.File == TGSI_FILE_BUFFER) {
                store_emit_buffer(ctx, args.resource, inst->Dst[0].Register.WriteMask,
-                                 value, voffset, args.cache_policy, writeonly_memory);
+                                 ac_build_gather_values(&ctx->ac, chans, 4),
+                                 voffset, args.cache_policy, writeonly_memory);
                return;
        }
 
        if (target == TGSI_TEXTURE_BUFFER) {
-               LLVMValueRef buf_args[] = {
-                       value,
+               unsigned num_channels = util_last_bit(inst->Dst[0].Register.WriteMask);
+               num_channels = util_next_power_of_two(num_channels);
+
+               LLVMValueRef buf_args[6] = {
+                       ac_build_gather_values(&ctx->ac, chans, 4),
                        args.resource,
                        vindex,
                        ctx->i32_0, /* voffset */
-                       LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_glc), 0),
-                       LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_slc), 0),
                };
 
+               if (HAVE_LLVM >= 0x0800) {
+                       buf_args[4] = ctx->i32_0; /* soffset */
+                       buf_args[5] = LLVMConstInt(ctx->i1, args.cache_policy, 0);
+               } else {
+                       buf_args[4] = LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_glc), 0);
+                       buf_args[5] = LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_slc), 0);
+               }
+
+               const char *types[] = { "f32", "v2f32", "v4f32" };
+               char name[128];
+
+               snprintf(name, sizeof(name), "%s.%s",
+                        HAVE_LLVM >= 0x0800 ? "llvm.amdgcn.struct.buffer.store.format" :
+                                              "llvm.amdgcn.buffer.store.format",
+                        types[CLAMP(num_channels, 1, 3) - 1]);
+
                emit_data->output[emit_data->chan] = ac_build_intrinsic(
-                       &ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32",
+                       &ctx->ac,
+                       name,
                        ctx->voidt, buf_args, 6,
                        ac_get_store_intr_attribs(writeonly_memory));
        } else {
                args.opcode = ac_image_store;
-               args.data[0] = value;
+               args.data[0] = ac_build_gather_values(&ctx->ac, chans, 4);
                args.dim = ac_image_dim_from_tgsi_target(ctx->screen, inst->Memory.Texture);
                args.attributes = ac_get_store_intr_attribs(writeonly_memory);
                args.dmask = 0xf;
@@ -877,19 +877,45 @@ static void atomic_emit(
        if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
                args.resource = shader_buffer_fetch_rsrc(ctx, &inst->Src[0], false);
                voffset = ac_to_integer(&ctx->ac, lp_build_emit_fetch(bld_base, inst, 1, 0));
-       } else if (inst->Src[0].Register.File == TGSI_FILE_IMAGE ||
-                  tgsi_is_bindless_image_file(inst->Src[0].Register.File)) {
+       } else {
                image_fetch_rsrc(bld_base, &inst->Src[0], true,
                                inst->Memory.Texture, &args.resource);
                image_fetch_coords(bld_base, inst, 1, args.resource, args.coords);
                vindex = args.coords[0]; /* for buffers only */
        }
 
-       if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
+       if (HAVE_LLVM >= 0x0800 &&
+           inst->Src[0].Register.File != TGSI_FILE_BUFFER &&
            inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
                LLVMValueRef buf_args[7];
                unsigned num_args = 0;
 
+               buf_args[num_args++] = args.data[0];
+               if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS)
+                       buf_args[num_args++] = args.data[1];
+
+               buf_args[num_args++] = args.resource;
+               buf_args[num_args++] = vindex;
+               buf_args[num_args++] = voffset;
+               buf_args[num_args++] = ctx->i32_0; /* soffset */
+               buf_args[num_args++] = LLVMConstInt(ctx->i32, args.cache_policy & ac_slc, 0);
+
+               char intrinsic_name[64];
+               snprintf(intrinsic_name, sizeof(intrinsic_name),
+                        "llvm.amdgcn.struct.buffer.atomic.%s", action->intr_name);
+               emit_data->output[emit_data->chan] =
+                       ac_to_float(&ctx->ac,
+                                   ac_build_intrinsic(&ctx->ac, intrinsic_name,
+                                                      ctx->i32, buf_args, num_args, 0));
+               return;
+       }
+
+       if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
+           (HAVE_LLVM < 0x0800 &&
+            inst->Memory.Texture == TGSI_TEXTURE_BUFFER)) {
+               LLVMValueRef buf_args[7];
+               unsigned num_args = 0;
+
                buf_args[num_args++] = args.data[0];
                if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS)
                        buf_args[num_args++] = args.data[1];
@@ -1016,6 +1042,7 @@ static void resq_emit(
        args.opcode = ac_image_get_resinfo;
        args.dim = ac_texture_dim_from_tgsi_target(ctx->screen, target);
        args.dmask = 0xf;
+       args.attributes = AC_FUNC_ATTR_READNONE;
 
        if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ) {
                tex_fetch_ptrs(bld_base, emit_data, &args.resource, NULL, NULL);
@@ -1045,20 +1072,20 @@ LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
                break;
        case AC_DESC_BUFFER:
                /* The buffer is in [4:7]. */
-               index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
-               index = LLVMBuildAdd(builder, index, ctx->i32_1, "");
+               index = ac_build_imad(&ctx->ac, index, LLVMConstInt(ctx->i32, 4, 0),
+                                     ctx->i32_1);
                list = LLVMBuildPointerCast(builder, list,
                                            ac_array_in_const32_addr_space(ctx->v4i32), "");
                break;
        case AC_DESC_FMASK:
                /* The FMASK is at [8:15]. */
-               index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 2, 0), "");
-               index = LLVMBuildAdd(builder, index, ctx->i32_1, "");
+               index = ac_build_imad(&ctx->ac, index, LLVMConstInt(ctx->i32, 2, 0),
+                                     ctx->i32_1);
                break;
        case AC_DESC_SAMPLER:
                /* The sampler state is at [12:15]. */
-               index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
-               index = LLVMBuildAdd(builder, index, LLVMConstInt(ctx->i32, 3, 0), "");
+               index = ac_build_imad(&ctx->ac, index, LLVMConstInt(ctx->i32, 4, 0),
+                                     LLVMConstInt(ctx->i32, 3, 0));
                list = LLVMBuildPointerCast(builder, list,
                                            ac_array_in_const32_addr_space(ctx->v4i32), "");
                break;
@@ -1131,6 +1158,15 @@ static void tex_fetch_ptrs(struct lp_build_tgsi_context *bld_base,
                                    ctx->param_bindless_samplers_and_images);
                index = lp_build_emit_fetch_src(bld_base, reg,
                                                TGSI_TYPE_UNSIGNED, 0);
+
+               /* Since bindless handle arithmetic can contain an unsigned integer
+                * wraparound and si_load_sampler_desc assumes there isn't any,
+                * use GEP without "inbounds" (inside ac_build_pointer_add)
+                * to prevent incorrect code generation and hangs.
+                */
+               index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->i32, 2, 0), "");
+               list = ac_build_pointer_add(&ctx->ac, list, index);
+               index = ctx->i32_0;
        }
 
        if (target == TGSI_TEXTURE_BUFFER)
@@ -1237,6 +1273,7 @@ si_lower_gather4_integer(struct si_shader_context *ctx,
                resinfo.sampler = args->sampler;
                resinfo.lod = ctx->ac.i32_0;
                resinfo.dmask = 0xf;
+               resinfo.attributes = AC_FUNC_ATTR_READNONE;
 
                LLVMValueRef texsize =
                        fix_resinfo(ctx, target,
@@ -1492,9 +1529,7 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
                   opcode != TGSI_OPCODE_TXF_LZ &&
                   ctx->screen->info.chip_class <= VI) {
                unsigned array_coord = target == TGSI_TEXTURE_1D_ARRAY ? 1 : 2;
-               args.coords[array_coord] =
-                       ac_build_intrinsic(&ctx->ac, "llvm.rint.f32", ctx->f32,
-                                          &args.coords[array_coord], 1, 0);
+               args.coords[array_coord] = ac_build_round(&ctx->ac, args.coords[array_coord]);
        }
 
        /* 1D textures are allocated and used as 2D on GFX9. */
@@ -1743,6 +1778,8 @@ static void si_llvm_emit_fbfetch(const struct lp_build_tgsi_action *action,
        args.opcode = ac_image_load;
        args.resource = image;
        args.dmask = 0xf;
+       args.attributes = AC_FUNC_ATTR_READNONE;
+
        if (ctx->shader->key.mono.u.ps.fbfetch_msaa)
                args.dim = ctx->shader->key.mono.u.ps.fbfetch_layered ?
                        ac_image_2darraymsaa : ac_image_2dmsaa;