freedreno/a6xx: fix border-color swizzles
[mesa.git] / src / gallium / drivers / radeonsi / si_state.c
index d1c0e0371dc27a917837c34e6a4d1e986447d447..458b108a7e3eb41371ac5b5bef74a016e88d0930 100644 (file)
@@ -474,10 +474,11 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
 
        si_pm4_set_reg(pm4, R_028B70_DB_ALPHA_TO_MASK,
                       S_028B70_ALPHA_TO_MASK_ENABLE(state->alpha_to_coverage) |
-                      S_028B70_ALPHA_TO_MASK_OFFSET0(2) |
-                      S_028B70_ALPHA_TO_MASK_OFFSET1(2) |
-                      S_028B70_ALPHA_TO_MASK_OFFSET2(2) |
-                      S_028B70_ALPHA_TO_MASK_OFFSET3(2));
+                      S_028B70_ALPHA_TO_MASK_OFFSET0(3) |
+                      S_028B70_ALPHA_TO_MASK_OFFSET1(1) |
+                      S_028B70_ALPHA_TO_MASK_OFFSET2(0) |
+                      S_028B70_ALPHA_TO_MASK_OFFSET3(2) |
+                      S_028B70_OFFSET_ROUND(1));
 
        if (state->alpha_to_coverage)
                blend->need_src_alpha_4bit |= 0xf;
@@ -2151,7 +2152,7 @@ static boolean si_is_format_supported(struct pipe_screen *screen,
        unsigned retval = 0;
 
        if (target >= PIPE_MAX_TEXTURE_TYPES) {
-               PRINT_ERR("r600: unsupported texture type %d\n", target);
+               PRINT_ERR("radeonsi: unsupported texture type %d\n", target);
                return false;
        }
 
@@ -3570,7 +3571,7 @@ static void si_set_min_samples(struct pipe_context *ctx, unsigned min_samples)
  * @param state 256-bit descriptor; only the high 128 bits are filled in
  */
 void
-si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf,
+si_make_buffer_descriptor(struct si_screen *screen, struct si_resource *buf,
                          enum pipe_format format,
                          unsigned offset, unsigned size,
                          uint32_t *state)
@@ -4061,7 +4062,7 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
        /* Buffer resource. */
        if (texture->target == PIPE_BUFFER) {
                si_make_buffer_descriptor(sctx->screen,
-                                         r600_resource(texture),
+                                         si_resource(texture),
                                          state->format,
                                          state->u.buf.offset,
                                          state->u.buf.size,
@@ -4581,7 +4582,7 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
                unsigned num_divisors = util_last_bit(v->instance_divisor_is_fetched);
 
                v->instance_divisor_factor_buffer =
-                       (struct r600_resource*)
+                       (struct si_resource*)
                        pipe_buffer_create(&sscreen->b, 0, PIPE_USAGE_DEFAULT,
                                           num_divisors * sizeof(divisor_factors[0]));
                if (!v->instance_divisor_factor_buffer) {
@@ -4630,7 +4631,7 @@ static void si_delete_vertex_element(struct pipe_context *ctx, void *state)
 
        if (sctx->vertex_elements == state)
                sctx->vertex_elements = NULL;
-       r600_resource_reference(&v->instance_divisor_factor_buffer, NULL);
+       si_resource_reference(&v->instance_divisor_factor_buffer, NULL);
        FREE(state);
 }
 
@@ -4655,7 +4656,7 @@ static void si_set_vertex_buffers(struct pipe_context *ctx,
                        dsti->stride = src->stride;
                        si_context_add_resource_size(sctx, buf);
                        if (buf)
-                               r600_resource(buf)->bind_history |= PIPE_BIND_VERTEX_BUFFER;
+                               si_resource(buf)->bind_history |= PIPE_BIND_VERTEX_BUFFER;
                }
        } else {
                for (i = 0; i < count; i++) {
@@ -4684,7 +4685,7 @@ static void si_set_tess_state(struct pipe_context *ctx,
        cb.user_buffer = NULL;
        cb.buffer_size = sizeof(array);
 
-       si_upload_const_buffer(sctx, (struct r600_resource**)&cb.buffer,
+       si_upload_const_buffer(sctx, (struct si_resource**)&cb.buffer,
                               (void*)array, sizeof(array),
                               &cb.buffer_offset);
 
@@ -4705,7 +4706,7 @@ static void si_texture_barrier(struct pipe_context *ctx, unsigned flags)
 }
 
 /* This only ensures coherency for shader image/buffer stores. */
-static void si_memory_barrier(struct pipe_context *ctx, unsigned flags)
+void si_memory_barrier(struct pipe_context *ctx, unsigned flags)
 {
        struct si_context *sctx = (struct si_context *)ctx;
 
@@ -4819,7 +4820,6 @@ void si_init_state_functions(struct si_context *sctx)
        sctx->b.set_vertex_buffers = si_set_vertex_buffers;
 
        sctx->b.texture_barrier = si_texture_barrier;
-       sctx->b.memory_barrier = si_memory_barrier;
        sctx->b.set_min_samples = si_set_min_samples;
        sctx->b.set_tess_state = si_set_tess_state;