radeonsi: make sure that DSA state != NULL and remove all NULL checking
[mesa.git] / src / gallium / drivers / radeonsi / si_state.c
index 6ec65f1b417bbbb33d44c9f22920d9b285170c4c..fad027a13f28dda850b7e273a0ea079feb426aec 100644 (file)
@@ -82,19 +82,17 @@ static void si_emit_cb_render_state(struct si_context *sctx)
        struct si_state_blend *blend = sctx->queued.named.blend;
        /* CB_COLORn_INFO.FORMAT=INVALID should disable unbound colorbuffers,
         * but you never know. */
-       uint32_t cb_target_mask = sctx->framebuffer.colorbuf_enabled_4bit;
+       uint32_t cb_target_mask = sctx->framebuffer.colorbuf_enabled_4bit &
+                                 blend->cb_target_mask;
        unsigned i;
 
-       if (blend)
-               cb_target_mask &= blend->cb_target_mask;
-
        /* Avoid a hang that happens when dual source blending is enabled
         * but there is not enough color outputs. This is undefined behavior,
         * so disable color writes completely.
         *
         * Reproducible with Unigine Heaven 4.0 and drirc missing.
         */
-       if (blend && blend->dual_src_blend &&
+       if (blend->dual_src_blend &&
            sctx->ps_shader.cso &&
            (sctx->ps_shader.cso->info.colors_written & 0x3) != 0x3)
                cb_target_mask = 0;
@@ -115,12 +113,11 @@ static void si_emit_cb_render_state(struct si_context *sctx)
                                   SI_TRACKED_CB_TARGET_MASK, cb_target_mask);
 
        if (sctx->chip_class >= GFX8) {
-               /* DCC MSAA workaround for blending.
+               /* DCC MSAA workaround.
                 * Alternatively, we can set CB_COLORi_DCC_CONTROL.OVERWRITE_-
                 * COMBINER_DISABLE, but that would be more complicated.
                 */
-               bool oc_disable = blend &&
-                                 blend->blend_enable_4bit & cb_target_mask &&
+               bool oc_disable = blend->dcc_msaa_corruption_4bit & cb_target_mask &&
                                  sctx->framebuffer.nr_samples >= 2;
                unsigned watermark = sctx->framebuffer.dcc_overwrite_combiner_watermark;
 
@@ -621,6 +618,9 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
 
                blend->blend_enable_4bit |= 0xfu << (i * 4);
 
+               if (sctx->family <= CHIP_NAVI14)
+                       blend->dcc_msaa_corruption_4bit |= 0xfu << (i * 4);
+
                /* This is only important for formats without alpha. */
                if (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
                    dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
@@ -631,6 +631,9 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
                        blend->need_src_alpha_4bit |= 0xfu << (i * 4);
        }
 
+       if (sctx->family <= CHIP_NAVI14 && logicop_enable)
+               blend->dcc_msaa_corruption_4bit |= blend->cb_target_enabled_4bit;
+
        if (blend->cb_target_mask) {
                color_control |= S_028808_MODE(mode);
        } else {
@@ -675,21 +678,19 @@ static void si_bind_blend_state(struct pipe_context *ctx, void *state)
        struct si_state_blend *old_blend = sctx->queued.named.blend;
        struct si_state_blend *blend = (struct si_state_blend *)state;
 
-       if (!state)
-               return;
+       if (!blend)
+               blend = (struct si_state_blend *)sctx->noop_blend;
 
-       si_pm4_bind_state(sctx, blend, state);
+       si_pm4_bind_state(sctx, blend, blend);
 
-       if (!old_blend ||
-           old_blend->cb_target_mask != blend->cb_target_mask ||
+       if (old_blend->cb_target_mask != blend->cb_target_mask ||
            old_blend->dual_src_blend != blend->dual_src_blend ||
            (old_blend->blend_enable_4bit != blend->blend_enable_4bit &&
             sctx->framebuffer.nr_samples >= 2 &&
             sctx->screen->dcc_msaa_allowed))
                si_mark_atom_dirty(sctx, &sctx->atoms.s.cb_render_state);
 
-       if (!old_blend ||
-           old_blend->cb_target_mask != blend->cb_target_mask ||
+       if (old_blend->cb_target_mask != blend->cb_target_mask ||
            old_blend->alpha_to_coverage != blend->alpha_to_coverage ||
            old_blend->alpha_to_one != blend->alpha_to_one ||
            old_blend->dual_src_blend != blend->dual_src_blend ||
@@ -698,15 +699,13 @@ static void si_bind_blend_state(struct pipe_context *ctx, void *state)
                sctx->do_update_shaders = true;
 
        if (sctx->screen->dpbb_allowed &&
-           (!old_blend ||
-            old_blend->alpha_to_coverage != blend->alpha_to_coverage ||
+           (old_blend->alpha_to_coverage != blend->alpha_to_coverage ||
             old_blend->blend_enable_4bit != blend->blend_enable_4bit ||
             old_blend->cb_target_enabled_4bit != blend->cb_target_enabled_4bit))
                si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
 
        if (sctx->screen->has_out_of_order_rast &&
-           (!old_blend ||
-            (old_blend->blend_enable_4bit != blend->blend_enable_4bit ||
+           ((old_blend->blend_enable_4bit != blend->blend_enable_4bit ||
              old_blend->cb_target_enabled_4bit != blend->cb_target_enabled_4bit ||
              old_blend->commutative_4bit != blend->commutative_4bit ||
              old_blend->logicop_enable != blend->logicop_enable)))
@@ -1304,8 +1303,8 @@ static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
        struct si_state_dsa *old_dsa = sctx->queued.named.dsa;
         struct si_state_dsa *dsa = state;
 
-        if (!state)
-                return;
+        if (!dsa)
+                dsa = (struct si_state_dsa *)sctx->noop_dsa;
 
        si_pm4_bind_state(sctx, dsa, dsa);
 
@@ -1315,19 +1314,17 @@ static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
                si_mark_atom_dirty(sctx, &sctx->atoms.s.stencil_ref);
        }
 
-       if (!old_dsa || old_dsa->alpha_func != dsa->alpha_func)
+       if (old_dsa->alpha_func != dsa->alpha_func)
                sctx->do_update_shaders = true;
 
        if (sctx->screen->dpbb_allowed &&
-           (!old_dsa ||
-            (old_dsa->depth_enabled != dsa->depth_enabled ||
+           ((old_dsa->depth_enabled != dsa->depth_enabled ||
              old_dsa->stencil_enabled != dsa->stencil_enabled ||
              old_dsa->db_can_write != dsa->db_can_write)))
                si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
 
        if (sctx->screen->has_out_of_order_rast &&
-           (!old_dsa ||
-            memcmp(old_dsa->order_invariance, dsa->order_invariance,
+           (memcmp(old_dsa->order_invariance, dsa->order_invariance,
                    sizeof(old_dsa->order_invariance))))
                si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_config);
 }
@@ -3537,11 +3534,7 @@ static bool si_out_of_order_rasterization(struct si_context *sctx)
 
        unsigned colormask = sctx->framebuffer.colorbuf_enabled_4bit;
 
-       if (blend) {
-               colormask &= blend->cb_target_enabled_4bit;
-       } else {
-               colormask = 0;
-       }
+       colormask &= blend->cb_target_enabled_4bit;
 
        /* Conservative: No logic op. */
        if (colormask && blend->logicop_enable)