radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0

[mesa.git] / src / gallium / drivers / radeonsi / si_state.h

diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index f70bddfb8ec141d1fb84d9679dae7cd4992a8a9e..0e067670c17f82dcba1285e743f2041425931373 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -31,6 +31,7 @@
 #include "radeon/r600_pipe_common.h"
 
 struct si_screen;
+struct si_shader;
 
 struct si_state_blend {
        struct si_pm4_state     pm4;
@@ -73,7 +74,6 @@ struct si_state_dsa {
        struct si_pm4_state     pm4;
        float                   alpha_ref;
        unsigned                alpha_func;
-       unsigned                db_render_control;
        uint8_t                 valuemask[2];
        uint8_t                 writemask[2];
 };
@@ -108,8 +108,6 @@ union si_state {
                struct si_pm4_state             *vs;
                struct si_pm4_state             *ps;
                struct si_pm4_state             *spi;
-               struct si_pm4_state             *draw_info;
-               struct si_pm4_state             *draw;
        } named;
        struct si_pm4_state     *array[0];
 };
@@ -255,9 +253,6 @@ boolean si_is_format_supported(struct pipe_screen *screen,
                                enum pipe_texture_target target,
                                unsigned sample_count,
                                unsigned usage);
-int si_shader_select(struct pipe_context *ctx,
-                    struct si_shader_selector *sel);
-void si_make_dummy_ps(struct si_context *sctx);
 void si_init_state_functions(struct si_context *sctx);
 void si_init_config(struct si_context *sctx);
 unsigned cik_bank_wh(unsigned bankwh);
@@ -267,6 +262,10 @@ unsigned cik_tile_split(unsigned tile_split);
 uint32_t si_num_banks(struct si_screen *sscreen, struct r600_texture *tex);
 unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil);
 
+/* si_state_shader.c */
+void si_update_shaders(struct si_context *sctx);
+void si_init_shader_functions(struct si_context *sctx);
+
 /* si_state_draw.c */
 extern const struct r600_atom si_atom_cache_flush;
 extern const struct r600_atom si_atom_msaa_config;
@@ -275,17 +274,5 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
 
 /* si_commands.c */
 void si_cmd_context_control(struct si_pm4_state *pm4);
-void si_cmd_draw_index_2(struct si_pm4_state *pm4, uint32_t max_size,
-                        uint64_t index_base, uint32_t index_count,
-                        uint32_t initiator, bool predicate);
-void si_cmd_draw_index_auto(struct si_pm4_state *pm4, uint32_t count,
-                           uint32_t initiator, bool predicate);
-void si_cmd_draw_indirect(struct si_pm4_state *pm4, uint64_t indirect_va,
-                         uint32_t indirect_offset, uint32_t base_vtx_loc,
-                         uint32_t start_inst_loc, bool predicate);
-void si_cmd_draw_index_indirect(struct si_pm4_state *pm4, uint64_t indirect_va,
-                               uint64_t index_va, uint32_t index_max_size,
-                               uint32_t indirect_offset, uint32_t base_vtx_loc,
-                               uint32_t start_inst_loc, bool predicate);
 
 #endif