radeonsi: Apply si_* file naming scheme.
[mesa.git] / src / gallium / drivers / radeonsi / si_state.h
index ff88d8305ca0d31a324a4c2bcc05847db1f837c0..3002d56e536dabb7690fee43bd14a890f684774d 100644 (file)
 #ifndef SI_STATE_H
 #define SI_STATE_H
 
-#include "radeonsi_pm4.h"
+#include "si_pm4.h"
+#include "../radeon/r600_pipe_common.h"
 
 struct si_state_blend {
        struct si_pm4_state     pm4;
        uint32_t                cb_target_mask;
-       uint32_t                cb_color_control;
+       bool                    alpha_to_one;
 };
 
 struct si_state_viewport {
@@ -43,35 +44,131 @@ struct si_state_viewport {
 struct si_state_rasterizer {
        struct si_pm4_state     pm4;
        bool                    flatshade;
+       bool                    two_side;
+       bool                    multisample_enable;
+       bool                    line_stipple_enable;
        unsigned                sprite_coord_enable;
        unsigned                pa_sc_line_stipple;
        unsigned                pa_su_sc_mode_cntl;
        unsigned                pa_cl_clip_cntl;
        unsigned                pa_cl_vs_out_cntl;
+       unsigned                clip_plane_enable;
        float                   offset_units;
        float                   offset_scale;
 };
 
+struct si_state_dsa {
+       struct si_pm4_state     pm4;
+       float                   alpha_ref;
+       unsigned                alpha_func;
+       unsigned                db_render_control;
+       uint8_t                 valuemask[2];
+       uint8_t                 writemask[2];
+};
+
+struct si_vertex_element
+{
+       unsigned                        count;
+       uint32_t                        rsrc_word3[PIPE_MAX_ATTRIBS];
+       struct pipe_vertex_element      elements[PIPE_MAX_ATTRIBS];
+};
+
 union si_state {
        struct {
+               struct si_pm4_state             *init;
                struct si_state_blend           *blend;
                struct si_pm4_state             *blend_color;
                struct si_pm4_state             *clip;
+               struct si_pm4_state             *sample_mask;
                struct si_pm4_state             *scissor;
                struct si_state_viewport        *viewport;
                struct si_pm4_state             *framebuffer;
                struct si_state_rasterizer      *rasterizer;
+               struct si_state_dsa             *dsa;
+               struct si_pm4_state             *fb_rs;
+               struct si_pm4_state             *fb_blend;
+               struct si_pm4_state             *dsa_stencil_ref;
+               struct si_pm4_state             *vs;
+               struct si_pm4_state             *vs_sampler;
+               struct si_pm4_state             *ps;
+               struct si_pm4_state             *ps_sampler;
+               struct si_pm4_state             *spi;
+               struct si_pm4_state             *vertex_buffers;
+               struct si_pm4_state             *draw_info;
+               struct si_pm4_state             *draw;
        } named;
        struct si_pm4_state     *array[0];
 };
 
+#define NUM_TEX_UNITS 16
+
+/* User sampler views:   0..15
+ * FMASK sampler views: 16..31 (no sampler states)
+ */
+#define FMASK_TEX_OFFSET       NUM_TEX_UNITS
+#define NUM_SAMPLER_VIEWS      (FMASK_TEX_OFFSET+NUM_TEX_UNITS)
+#define NUM_SAMPLER_STATES     NUM_TEX_UNITS
+
+#define NUM_PIPE_CONST_BUFFERS 16
+#define NUM_CONST_BUFFERS 17
+
+/* This represents resource descriptors in memory, such as buffer resources,
+ * image resources, and sampler states.
+ */
+struct si_descriptors {
+       struct r600_atom atom;
+
+       /* The size of one resource descriptor. */
+       unsigned element_dw_size;
+       /* The maximum number of resource descriptors. */
+       unsigned num_elements;
+
+       /* The buffer where resource descriptors are stored. */
+       struct r600_resource *buffer;
+
+       /* The i-th bit is set if that element is dirty (changed but not emitted). */
+       unsigned dirty_mask;
+       /* The i-th bit is set if that element is enabled (non-NULL resource). */
+       unsigned enabled_mask;
+
+       /* We can't update descriptors directly because the GPU might be
+        * reading them at the same time, so we have to update them
+        * in a copy-on-write manner. Each such copy is called a context,
+        * which is just another array descriptors in the same buffer. */
+       unsigned current_context_id;
+       /* The size of a context, should be equal to 4*element_dw_size*num_elements. */
+       unsigned context_size;
+
+       /* The shader userdata register where the 64-bit pointer to the descriptor
+        * array will be stored. */
+       unsigned shader_userdata_reg;
+};
+
+struct si_sampler_views {
+       struct si_descriptors           desc;
+       struct pipe_sampler_view        *views[NUM_SAMPLER_VIEWS];
+       uint32_t                        *desc_data[NUM_SAMPLER_VIEWS];
+};
+
+struct si_buffer_resources {
+       struct si_descriptors           desc;
+       unsigned                        num_buffers;
+       enum radeon_bo_usage            shader_usage; /* READ, WRITE, or READWRITE */
+       struct pipe_resource            **buffers; /* this has num_buffers elements */
+       uint32_t                        *desc_storage; /* this has num_buffers*4 elements */
+       uint32_t                        **desc_data; /* an array of pointers pointing to desc_storage */
+};
+
 #define si_pm4_block_idx(member) \
        (offsetof(union si_state, named.member) / sizeof(struct si_pm4_state *))
 
+#define si_pm4_state_changed(rctx, member) \
+       ((rctx)->queued.named.member != (rctx)->emitted.named.member)
+
 #define si_pm4_bind_state(rctx, member, value) \
        do { \
                (rctx)->queued.named.member = (value); \
-       } while(0);
+       } while(0)
 
 #define si_pm4_delete_state(rctx, member, value) \
        do { \
@@ -80,7 +177,7 @@ union si_state {
                } \
                si_pm4_free_state(rctx, (struct si_pm4_state *)(value), \
                                  si_pm4_block_idx(member)); \
-       } while(0);
+       } while(0)
 
 #define si_pm4_set_state(rctx, member, value) \
        do { \
@@ -90,8 +187,46 @@ union si_state {
                                si_pm4_block_idx(member)); \
                        (rctx)->queued.named.member = (value); \
                } \
-       } while(0);
+       } while(0)
+
+/* si_descriptors.c */
+void si_set_sampler_view(struct r600_context *rctx, unsigned shader,
+                        unsigned slot, struct pipe_sampler_view *view,
+                        unsigned *view_desc);
+void si_init_all_descriptors(struct r600_context *rctx);
+void si_release_all_descriptors(struct r600_context *rctx);
+void si_all_descriptors_begin_new_cs(struct r600_context *rctx);
+void si_copy_buffer(struct r600_context *rctx,
+                   struct pipe_resource *dst, struct pipe_resource *src,
+                   uint64_t dst_offset, uint64_t src_offset, unsigned size);
 
+/* si_state.c */
+struct si_pipe_shader_selector;
+struct r600_surface;
+
+boolean si_is_format_supported(struct pipe_screen *screen,
+                               enum pipe_format format,
+                               enum pipe_texture_target target,
+                               unsigned sample_count,
+                               unsigned usage);
+int si_shader_select(struct pipe_context *ctx,
+                    struct si_pipe_shader_selector *sel,
+                    unsigned *dirty);
 void si_init_state_functions(struct r600_context *rctx);
+void si_init_config(struct r600_context *rctx);
+
+/* si_state_draw.c */
+extern const struct r600_atom si_atom_cache_flush;
+void si_emit_cache_flush(struct r600_common_context *rctx, struct r600_atom *atom);
+void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
+
+/* si_commands.c */
+void si_cmd_context_control(struct si_pm4_state *pm4);
+void si_cmd_draw_index_2(struct si_pm4_state *pm4, uint32_t max_size,
+                        uint64_t index_base, uint32_t index_count,
+                        uint32_t initiator, bool predicate);
+void si_cmd_draw_index_auto(struct si_pm4_state *pm4, uint32_t count,
+                           uint32_t initiator, bool predicate);
+void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl);
 
 #endif