/*
* Copyright 2012 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Christian König <christian.koenig@amd.com>
*/
#ifndef SI_STATE_H
#define SI_STATE_H
#include "si_pm4.h"
-#include "radeon/r600_pipe_common.h"
#include "pipebuffer/pb_slab.h"
+#include "util/u_blitter.h"
#define SI_NUM_GRAPHICS_SHADERS (PIPE_SHADER_TESS_EVAL+1)
#define SI_NUM_SHADERS (PIPE_SHADER_COMPUTE+1)
-#define SI_MAX_ATTRIBS 16
#define SI_NUM_VERTEX_BUFFERS SI_MAX_ATTRIBS
#define SI_NUM_SAMPLERS 32 /* OpenGL textures units per shader */
#define SI_NUM_CONST_BUFFERS 16
struct si_screen;
struct si_shader;
struct si_shader_selector;
+struct r600_texture;
+struct si_qbo_state;
+
+/* State atoms are callbacks which write a sequence of packets into a GPU
+ * command buffer (AKA indirect buffer, AKA IB, AKA command stream, AKA CS).
+ */
+struct si_atom {
+ void (*emit)(struct si_context *ctx, struct si_atom *state);
+};
struct si_state_blend {
struct si_pm4_state pm4;
};
struct si_stencil_ref {
- struct r600_atom atom;
struct pipe_stencil_ref state;
struct si_dsa_stencil_ref_part dsa_part;
};
union si_state_atoms {
struct {
/* The order matters. */
- struct r600_atom *render_cond;
- struct r600_atom *streamout_begin;
- struct r600_atom *streamout_enable; /* must be after streamout_begin */
- struct r600_atom *framebuffer;
- struct r600_atom *msaa_sample_locs;
- struct r600_atom *db_render_state;
- struct r600_atom *dpbb_state;
- struct r600_atom *msaa_config;
- struct r600_atom *sample_mask;
- struct r600_atom *cb_render_state;
- struct r600_atom *blend_color;
- struct r600_atom *clip_regs;
- struct r600_atom *clip_state;
- struct r600_atom *shader_pointers;
- struct r600_atom *scissors;
- struct r600_atom *viewports;
- struct r600_atom *stencil_ref;
- struct r600_atom *spi_map;
- struct r600_atom *scratch_state;
+ struct si_atom render_cond;
+ struct si_atom streamout_begin;
+ struct si_atom streamout_enable; /* must be after streamout_begin */
+ struct si_atom framebuffer;
+ struct si_atom msaa_sample_locs;
+ struct si_atom db_render_state;
+ struct si_atom dpbb_state;
+ struct si_atom msaa_config;
+ struct si_atom sample_mask;
+ struct si_atom cb_render_state;
+ struct si_atom blend_color;
+ struct si_atom clip_regs;
+ struct si_atom clip_state;
+ struct si_atom shader_pointers;
+ struct si_atom scissors;
+ struct si_atom viewports;
+ struct si_atom stencil_ref;
+ struct si_atom spi_map;
+ struct si_atom scratch_state;
} s;
- struct r600_atom *array[0];
+ struct si_atom array[0];
};
-#define SI_NUM_ATOMS (sizeof(union si_state_atoms)/sizeof(struct r600_atom*))
+#define SI_NUM_ATOMS (sizeof(union si_state_atoms)/sizeof(struct si_atom*))
struct si_shader_data {
- struct r600_atom atom;
uint32_t sh_base[SI_NUM_SHADERS];
};
SI_PS_CONST_POLY_STIPPLE,
SI_PS_CONST_SAMPLE_POSITIONS,
+ /* Image descriptor of color buffer 0 for KHR_blend_equation_advanced. */
+ SI_PS_IMAGE_COLORBUF0,
+ SI_PS_IMAGE_COLORBUF0_HI,
+ SI_PS_IMAGE_COLORBUF0_FMASK,
+ SI_PS_IMAGE_COLORBUF0_FMASK_HI,
+
SI_NUM_RW_BUFFERS,
};
/* The buffer where the descriptors have been uploaded. */
struct r600_resource *buffer;
- int buffer_offset; /* can be negative if not using lower slots */
+ uint64_t gpu_address;
- /* The size of one descriptor. */
- ubyte element_dw_size;
/* The maximum number of descriptors. */
uint32_t num_elements;
uint32_t first_active_slot;
uint32_t num_active_slots;
- /* The SGPR index where the 64-bit pointer to the descriptor array will
- * be stored. */
- ubyte shader_userdata_offset;
+ /* The SH register offset relative to USER_DATA*_0 where the pointer
+ * to the descriptor array will be stored. */
+ short shader_userdata_offset;
+ /* The size of one descriptor. */
+ ubyte element_dw_size;
+ /* If there is only one slot enabled, bind it directly instead of
+ * uploading descriptors. -1 if disabled. */
+ signed char slot_index_to_bind_directly;
};
struct si_buffer_resources {
unsigned base_level, unsigned first_level,
unsigned block_width, bool is_stencil,
uint32_t *state);
+void si_update_ps_colorbuf0_slot(struct si_context *sctx);
void si_get_pipe_constant_buffer(struct si_context *sctx, uint shader,
uint slot, struct pipe_constant_buffer *cbuf);
void si_get_shader_buffers(struct si_context *sctx,
enum pipe_shader_type shader,
uint start_slot, uint count,
struct pipe_shader_buffer *sbuf);
-void si_set_ring_buffer(struct pipe_context *ctx, uint slot,
+void si_set_ring_buffer(struct si_context *sctx, uint slot,
struct pipe_resource *buffer,
unsigned stride, unsigned num_records,
bool add_tid, bool swizzle,
void si_shader_change_notify(struct si_context *sctx);
void si_update_needs_color_decompress_masks(struct si_context *sctx);
void si_emit_graphics_shader_pointers(struct si_context *sctx,
- struct r600_atom *atom);
+ struct si_atom *atom);
void si_emit_compute_shader_pointers(struct si_context *sctx);
void si_set_rw_buffer(struct si_context *sctx,
uint slot, const struct pipe_constant_buffer *input);
unsigned entry_size,
unsigned group_index);
void si_bindless_descriptor_slab_free(void *priv, struct pb_slab *pslab);
-
+void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
+ uint64_t old_va);
/* si_state.c */
struct si_shader_selector;
-void si_init_atom(struct si_context *sctx, struct r600_atom *atom,
- struct r600_atom **list_elem,
- void (*emit_func)(struct si_context *ctx, struct r600_atom *state));
+void si_init_atom(struct si_context *sctx, struct si_atom *atom,
+ void (*emit_func)(struct si_context *ctx, struct si_atom *state));
void si_init_state_functions(struct si_context *sctx);
void si_init_screen_state_functions(struct si_screen *sscreen);
void
unsigned width0, unsigned height0,
unsigned force_level);
void si_update_fb_dirtiness_after_rendering(struct si_context *sctx);
+void si_update_ps_iter_samples(struct si_context *sctx);
+void si_save_qbo_state(struct si_context *sctx, struct si_qbo_state *st);
+void si_set_occlusion_query_state(struct si_context *sctx,
+ bool old_perfect_enable);
/* si_state_binning.c */
-void si_emit_dpbb_state(struct si_context *sctx, struct r600_atom *state);
+void si_emit_dpbb_state(struct si_context *sctx, struct si_atom *state);
/* si_state_shaders.c */
bool si_update_shaders(struct si_context *sctx);
void si_init_streamout_functions(struct si_context *sctx);
-static inline unsigned
-si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil)
-{
- if (stencil)
- return rtex->surface.u.legacy.stencil_tiling_index[level];
- else
- return rtex->surface.u.legacy.tiling_index[level];
-}
-
static inline unsigned si_get_constbuf_slot(unsigned slot)
{
/* Constant buffers are in slots [16..31], ascending */
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