radeonsi/gfx9: fix an oversight in primitive binning code

[mesa.git] / src / gallium / drivers / radeonsi / si_state_binning.c

diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index b3c397ccd487ee857c6111fbafe29bbd7470bdbb..5f280ae7ec1ded77053f52f27e59a3ecff272282 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -196,7 +196,7 @@ static struct uvec2 si_get_depth_bin_size(struct si_context *sctx)
        unsigned stencil_coeff = tex->surface.has_stencil &&
                                 dsa->stencil_enabled ? 1 : 0;
        unsigned sum = 4 * (depth_coeff + stencil_coeff) *
-                      tex->buffer.b.b.nr_samples;
+                      MAX2(tex->buffer.b.b.nr_samples, 1);
 
        static const si_bin_size_subtable table[] = {
                {