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radeonsi: fix freeing descriptor buffers
[mesa.git] / src / gallium / drivers / radeonsi / si_state_draw.c
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index c5a59750390e0b0588313cf2c2a74a61f14913d8..480e3f8a52013be76312628d5bc4aa36e6131f7a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -76,7 +76,6 @@ static void si_pipe_shader_es(struct pipe_context *ctx, struct si_pipe_shader *s
        si_pm4_set_reg(pm4, R_00B32C_SPI_SHADER_PGM_RSRC2_ES,
                       S_00B32C_USER_SGPR(num_user_sgprs));
 
-       si_pm4_bind_state(sctx, es, shader->pm4);
        sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
@@ -122,7 +121,7 @@ static void si_pipe_shader_gs(struct pipe_context *ctx, struct si_pipe_shader *s
        si_pm4_set_reg(pm4, R_028A68_VGT_GSVS_RING_OFFSET_3, gsvs_itemsize);
 
        si_pm4_set_reg(pm4, R_028AAC_VGT_ESGS_RING_ITEMSIZE,
-                      shader->shader.ninput * (16 >> 2));
+                      shader->shader.nparam * (16 >> 2));
        si_pm4_set_reg(pm4, R_028AB0_VGT_GSVS_RING_ITEMSIZE, gsvs_itemsize);
 
        si_pm4_set_reg(pm4, R_028B38_VGT_GS_MAX_VERT_OUT, gs_max_vert_out);
@@ -149,7 +148,6 @@ static void si_pipe_shader_gs(struct pipe_context *ctx, struct si_pipe_shader *s
        si_pm4_set_reg(pm4, R_00B22C_SPI_SHADER_PGM_RSRC2_GS,
                       S_00B22C_USER_SGPR(num_user_sgprs));
 
-       si_pm4_bind_state(sctx, gs, shader->pm4);
        sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
@@ -226,7 +224,6 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s
                       S_00B12C_SO_BASE3_EN(!!shader->selector->so.stride[3]) |
                       S_00B12C_SO_EN(!!shader->selector->so.num_outputs));
 
-       si_pm4_bind_state(sctx, vs, shader->pm4);
        sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
@@ -287,7 +284,7 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
                exports_ps = 2;
        }
 
-       spi_ps_in_control = S_0286D8_NUM_INTERP(shader->shader.ninterp) |
+       spi_ps_in_control = S_0286D8_NUM_INTERP(shader->shader.nparam) |
                S_0286D8_BC_OPTIMIZE_DISABLE(1);
 
        si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl);
@@ -342,7 +339,6 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
 
        shader->cb0_is_integer = sctx->fb_cb0_is_integer;
        shader->sprite_coord_enable = sctx->sprite_coord_enable;
-       si_pm4_bind_state(sctx, ps, shader->pm4);
        sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
@@ -363,10 +359,10 @@ static unsigned si_conv_pipe_prim(unsigned pprim)
                [PIPE_PRIM_QUADS]                       = V_008958_DI_PT_QUADLIST,
                [PIPE_PRIM_QUAD_STRIP]                  = V_008958_DI_PT_QUADSTRIP,
                [PIPE_PRIM_POLYGON]                     = V_008958_DI_PT_POLYGON,
-               [PIPE_PRIM_LINES_ADJACENCY]             = ~0,
-               [PIPE_PRIM_LINE_STRIP_ADJACENCY]        = ~0,
-               [PIPE_PRIM_TRIANGLES_ADJACENCY]         = ~0,
-               [PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY]    = ~0
+               [PIPE_PRIM_LINES_ADJACENCY]             = V_008958_DI_PT_LINELIST_ADJ,
+               [PIPE_PRIM_LINE_STRIP_ADJACENCY]        = V_008958_DI_PT_LINESTRIP_ADJ,
+               [PIPE_PRIM_TRIANGLES_ADJACENCY]         = V_008958_DI_PT_TRILIST_ADJ,
+               [PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY]    = V_008958_DI_PT_TRISTRIP_ADJ
         };
        unsigned result = prim_conv[pprim];
         if (result == ~0) {
@@ -403,7 +399,7 @@ static bool si_update_draw_info_state(struct si_context *sctx,
                                      const struct pipe_index_buffer *ib)
 {
        struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
-       struct si_shader *vs = &sctx->vs_shader->current->shader;
+       struct si_shader *vs = si_get_vs_state(sctx);
        unsigned prim = si_conv_pipe_prim(info->mode);
        unsigned gs_out_prim =
                si_conv_prim_to_gs_out(sctx->gs_shader ?
@@ -488,7 +484,7 @@ static bool si_update_draw_info_state(struct si_context *sctx,
 static void si_update_spi_map(struct si_context *sctx)
 {
        struct si_shader *ps = &sctx->ps_shader->current->shader;
-       struct si_shader *vs = &sctx->vs_shader->current->shader;
+       struct si_shader *vs = si_get_vs_state(sctx);
        struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
        unsigned i, j, tmp;
 
@@ -552,13 +548,13 @@ static void si_init_gs_rings(struct si_context *sctx)
 
        sctx->esgs_ring.buffer =
                pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM,
-                                  PIPE_USAGE_STATIC, size);
+                                  PIPE_USAGE_DEFAULT, size);
        sctx->esgs_ring.buffer_size = size;
 
        size = 64 * 1024 * 1024;
        sctx->gsvs_ring.buffer =
                pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM,
-                                  PIPE_USAGE_STATIC, size);
+                                  PIPE_USAGE_DEFAULT, size);
        sctx->gsvs_ring.buffer_size = size;
 
        if (sctx->b.chip_class >= CIK) {
@@ -573,18 +569,20 @@ static void si_init_gs_rings(struct si_context *sctx)
                               sctx->gsvs_ring.buffer_size / 256);
        }
 
-       si_set_ring_buffer(&sctx->b.b, SI_SHADER_EXPORT, 0, &sctx->esgs_ring,
-                          0, sctx->esgs_ring.buffer_size, true, true, 4, 64);
-       si_set_ring_buffer(&sctx->b.b, PIPE_SHADER_GEOMETRY, 0, &sctx->esgs_ring,
-                          0, sctx->esgs_ring.buffer_size, false, false, 0, 0);
-       si_set_ring_buffer(&sctx->b.b, PIPE_SHADER_VERTEX, 0, &sctx->gsvs_ring,
-                          0, sctx->gsvs_ring.buffer_size, false, false, 0, 0);
+       si_set_ring_buffer(&sctx->b.b, PIPE_SHADER_VERTEX, SI_RING_ESGS,
+                          &sctx->esgs_ring, 0, sctx->esgs_ring.buffer_size,
+                          true, true, 4, 64);
+       si_set_ring_buffer(&sctx->b.b, PIPE_SHADER_GEOMETRY, SI_RING_ESGS,
+                          &sctx->esgs_ring, 0, sctx->esgs_ring.buffer_size,
+                          false, false, 0, 0);
+       si_set_ring_buffer(&sctx->b.b, PIPE_SHADER_VERTEX, SI_RING_GSVS,
+                          &sctx->gsvs_ring, 0, sctx->gsvs_ring.buffer_size,
+                          false, false, 0, 0);
 }
 
 static void si_update_derived_state(struct si_context *sctx)
 {
        struct pipe_context * ctx = (struct pipe_context*)sctx;
-       unsigned vs_dirty = 0, ps_dirty = 0;
 
        if (!sctx->blitter->running) {
                /* Flush depth textures which need to be flushed. */
@@ -599,33 +597,25 @@ static void si_update_derived_state(struct si_context *sctx)
        }
 
        if (sctx->gs_shader) {
-               unsigned es_dirty = 0, gs_dirty = 0;
-
-               si_shader_select(ctx, sctx->gs_shader, &gs_dirty);
+               si_shader_select(ctx, sctx->gs_shader);
 
                if (!sctx->gs_shader->current->pm4) {
                        si_pipe_shader_gs(ctx, sctx->gs_shader->current);
                        si_pipe_shader_vs(ctx,
                                          sctx->gs_shader->current->gs_copy_shader);
-                       gs_dirty = 0;
                }
 
-               if (gs_dirty) {
-                       si_pm4_bind_state(sctx, gs, sctx->gs_shader->current->pm4);
-                       si_pm4_bind_state(sctx, vs,
-                                         sctx->gs_shader->current->gs_copy_shader->pm4);
-               }
+               si_pm4_bind_state(sctx, gs, sctx->gs_shader->current->pm4);
+               si_pm4_bind_state(sctx, vs, sctx->gs_shader->current->gs_copy_shader->pm4);
+
+               sctx->b.streamout.stride_in_dw = sctx->gs_shader->so.stride;
 
-               si_shader_select(ctx, sctx->vs_shader, &es_dirty);
+               si_shader_select(ctx, sctx->vs_shader);
 
-               if (!sctx->vs_shader->current->pm4) {
+               if (!sctx->vs_shader->current->pm4)
                        si_pipe_shader_es(ctx, sctx->vs_shader->current);
-                       es_dirty = 0;
-               }
 
-               if (es_dirty) {
-                       si_pm4_bind_state(sctx, es, sctx->vs_shader->current->pm4);
-               }
+               si_pm4_bind_state(sctx, es, sctx->vs_shader->current->pm4);
 
                if (!sctx->gs_rings)
                        si_init_gs_rings(sctx);
@@ -633,7 +623,8 @@ static void si_update_derived_state(struct si_context *sctx)
                        sctx->b.flags |= R600_CONTEXT_VGT_FLUSH;
                si_pm4_bind_state(sctx, gs_rings, sctx->gs_rings);
 
-               si_set_ring_buffer(ctx, PIPE_SHADER_GEOMETRY, 1, &sctx->gsvs_ring,
+               si_set_ring_buffer(ctx, PIPE_SHADER_GEOMETRY, SI_RING_GSVS,
+                                  &sctx->gsvs_ring,
                                   sctx->gs_shader->current->shader.gs_max_out_vertices *
                                   sctx->gs_shader->current->shader.noutput * 16,
                                   64, true, true, 4, 16);
@@ -648,16 +639,14 @@ static void si_update_derived_state(struct si_context *sctx)
                }
                si_pm4_bind_state(sctx, gs_onoff, sctx->gs_on);
        } else {
-               si_shader_select(ctx, sctx->vs_shader, &vs_dirty);
+               si_shader_select(ctx, sctx->vs_shader);
 
-               if (!sctx->vs_shader->current->pm4) {
+               if (!sctx->vs_shader->current->pm4)
                        si_pipe_shader_vs(ctx, sctx->vs_shader->current);
-                       vs_dirty = 0;
-               }
 
-               if (vs_dirty) {
-                       si_pm4_bind_state(sctx, vs, sctx->vs_shader->current->pm4);
-               }
+               si_pm4_bind_state(sctx, vs, sctx->vs_shader->current->pm4);
+
+               sctx->b.streamout.stride_in_dw = sctx->vs_shader->so.stride;
 
                if (!sctx->gs_off) {
                        sctx->gs_off = si_pm4_alloc_state(sctx);
@@ -671,20 +660,13 @@ static void si_update_derived_state(struct si_context *sctx)
                si_pm4_bind_state(sctx, es, NULL);
        }
 
-       si_shader_select(ctx, sctx->ps_shader, &ps_dirty);
+       si_shader_select(ctx, sctx->ps_shader);
 
-       if (!sctx->ps_shader->current->pm4) {
-               si_pipe_shader_ps(ctx, sctx->ps_shader->current);
-               ps_dirty = 0;
-       }
-       if (sctx->ps_shader->current->cb0_is_integer != sctx->fb_cb0_is_integer) {
+       if (!sctx->ps_shader->current->pm4 ||
+           sctx->ps_shader->current->cb0_is_integer != sctx->fb_cb0_is_integer)
                si_pipe_shader_ps(ctx, sctx->ps_shader->current);
-               ps_dirty = 0;
-       }
 
-       if (ps_dirty) {
-               si_pm4_bind_state(sctx, ps, sctx->ps_shader->current->pm4);
-       }
+       si_pm4_bind_state(sctx, ps, sctx->ps_shader->current->pm4);
 
        if (si_pm4_state_changed(sctx, ps) || si_pm4_state_changed(sctx, vs)) {
                /* XXX: Emitting the PS state even when only the VS changed