radeonsi: split si_clear_buffer to remove enum si_method

[mesa.git] / src / gallium / drivers / radeonsi / si_state_draw.c

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 2291b4a00addb7631b4488fcc6b763dd976cff13..b1d7437edb99a21be4299811b39409e9945cda55 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -134,7 +134,7 @@ static bool si_emit_derived_tess_state(struct si_context *sctx,
                num_tcs_patch_outputs = 2; /* TESSINNER + TESSOUTER */
        }
 
-       input_vertex_size = num_tcs_inputs * 16;
+       input_vertex_size = ls->lshs_vertex_stride;
        output_vertex_size = num_tcs_outputs * 16;
 
        input_patch_size = num_tcs_input_cp * input_vertex_size;
@@ -571,11 +571,22 @@ static void si_emit_vs_state(struct si_context *sctx,
        if (sctx->current_vs_state != sctx->last_vs_state) {
                struct radeon_cmdbuf *cs = sctx->gfx_cs;
 
+               /* For the API vertex shader (VS_STATE_INDEXED). */
                radeon_set_sh_reg(cs,
                        sctx->shader_pointers.sh_base[PIPE_SHADER_VERTEX] +
                        SI_SGPR_VS_STATE_BITS * 4,
                        sctx->current_vs_state);
 
+               /* For vertex color clamping, which is done in the last stage
+                * before the rasterizer. */
+               if (sctx->gs_shader.cso || sctx->tes_shader.cso) {
+                       /* GS copy shader or TES if GS is missing. */
+                       radeon_set_sh_reg(cs,
+                               R_00B130_SPI_SHADER_USER_DATA_VS_0 +
+                               SI_SGPR_VS_STATE_BITS * 4,
+                               sctx->current_vs_state);
+               }
+
                sctx->last_vs_state = sctx->current_vs_state;
        }
 }
@@ -1532,7 +1543,7 @@ void si_draw_rectangle(struct blitter_context *blitter,
        case UTIL_BLITTER_ATTRIB_NONE:;
        }
 
-       pipe->bind_vs_state(pipe, si_get_blit_vs(sctx, type, num_instances));
+       pipe->bind_vs_state(pipe, si_get_blitter_vs(sctx, type, num_instances));
 
        struct pipe_draw_info info = {};
        info.mode = SI_PRIM_RECTANGLE_LIST;