radeonsi: add separate HUD counters for CB and DB cache flushes

[mesa.git] / src / gallium / drivers / radeonsi / si_state_draw.c

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index ec564c1a05789a215b05fdc1fa1b18b2233a3724..d039e015cc67a2252e34454e36861187006d87ea 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -861,9 +861,10 @@ void si_emit_cache_flush(struct si_context *sctx)
        uint32_t flush_cb_db = rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
                                              SI_CONTEXT_FLUSH_AND_INV_DB);
 
-       if (rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
-                          SI_CONTEXT_FLUSH_AND_INV_DB))
-               sctx->b.num_fb_cache_flushes++;
+       if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB)
+               sctx->b.num_cb_cache_flushes++;
+       if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB)
+               sctx->b.num_db_cache_flushes++;
 
        /* SI has a bug that it always flushes ICACHE and KCACHE if either
         * bit is set. An alternative way is to write SQC_CACHES, but that