radeonsi: remove r600_ring::flush callback

[mesa.git] / src / gallium / drivers / radeonsi / si_state_shaders.c

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index d7742eafb04eb9c697e8ec56b440c9ba7e2c2e34..1d3da36215a8f4213ca1e824ddb0f6d477858e02 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1215,11 +1215,7 @@ static void si_shader_selector_key_hw_vs(struct si_context *sctx,
                                      ps->info.writes_samplemask ||
                                      alpha_to_coverage ||
                                      si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS;
-
-               unsigned ps_colormask = sctx->framebuffer.colorbuf_enabled_4bit &
-                                       sctx->queued.named.blend->cb_target_mask;
-               if (!ps->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
-                       ps_colormask &= ps->colors_written_4bit;
+               unsigned ps_colormask = si_get_total_colormask(sctx);
 
                ps_disabled = sctx->queued.named.rasterizer->rasterizer_discard ||
                              (!ps_colormask &&
@@ -2779,7 +2775,7 @@ static bool si_update_gs_ring_buffers(struct si_context *sctx)
 
        /* Flush the context to re-emit both init_config states. */
        sctx->b.initial_gfx_cs_size = 0; /* force flush */
-       si_context_gfx_flush(sctx, PIPE_FLUSH_ASYNC, NULL);
+       si_flush_gfx_cs(sctx, PIPE_FLUSH_ASYNC, NULL);
 
        /* Set ring bindings. */
        if (sctx->esgs_ring) {
@@ -3056,7 +3052,7 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
         */
        si_pm4_upload_indirect_buffer(sctx, sctx->init_config);
        sctx->b.initial_gfx_cs_size = 0; /* force flush */
-       si_context_gfx_flush(sctx, PIPE_FLUSH_ASYNC, NULL);
+       si_flush_gfx_cs(sctx, PIPE_FLUSH_ASYNC, NULL);
 }
 
 /**