#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_ureg.h"
#include "util/hash_table.h"
-#include "util/u_hash.h"
+#include "util/crc32.h"
#include "util/u_memory.h"
#include "util/u_prim.h"
+#include "util/disk_cache.h"
+#include "util/mesa-sha1.h"
+
/* SHADER_CACHE */
/**
*/
static bool si_shader_cache_insert_shader(struct si_screen *sscreen,
void *tgsi_binary,
- struct si_shader *shader)
+ struct si_shader *shader,
+ bool insert_into_disk_cache)
{
void *hw_binary;
struct hash_entry *entry;
+ uint8_t key[CACHE_KEY_SIZE];
entry = _mesa_hash_table_search(sscreen->shader_cache, tgsi_binary);
if (entry)
return false;
}
+ if (sscreen->b.disk_shader_cache && insert_into_disk_cache) {
+ _mesa_sha1_compute(tgsi_binary, *((uint32_t *)tgsi_binary), key);
+ disk_cache_put(sscreen->b.disk_shader_cache, key, hw_binary,
+ *((uint32_t *) hw_binary));
+ }
+
return true;
}
{
struct hash_entry *entry =
_mesa_hash_table_search(sscreen->shader_cache, tgsi_binary);
- if (!entry)
- return false;
+ if (!entry) {
+ if (sscreen->b.disk_shader_cache) {
+ unsigned char sha1[CACHE_KEY_SIZE];
+ size_t tg_size = *((uint32_t *) tgsi_binary);
+
+ _mesa_sha1_compute(tgsi_binary, tg_size, sha1);
+
+ size_t binary_size;
+ uint8_t *buffer =
+ disk_cache_get(sscreen->b.disk_shader_cache,
+ sha1, &binary_size);
+ if (!buffer)
+ return false;
- if (!si_load_shader_binary(shader, entry->data))
- return false;
+ if (binary_size < sizeof(uint32_t) ||
+ *((uint32_t*)buffer) != binary_size) {
+ /* Something has gone wrong discard the item
+ * from the cache and rebuild/link from
+ * source.
+ */
+ assert(!"Invalid radeonsi shader disk cache "
+ "item!");
+
+ disk_cache_remove(sscreen->b.disk_shader_cache,
+ sha1);
+ free(buffer);
+
+ return false;
+ }
+
+ if (!si_load_shader_binary(shader, buffer)) {
+ free(buffer);
+ return false;
+ }
+ free(buffer);
+ if (!si_shader_cache_insert_shader(sscreen, tgsi_binary,
+ shader, false))
+ FREE(tgsi_binary);
+ } else {
+ return false;
+ }
+ } else {
+ if (si_load_shader_binary(shader, entry->data))
+ FREE(tgsi_binary);
+ else
+ return false;
+ }
p_atomic_inc(&sscreen->b.num_shader_cache_hits);
return true;
}
bool si_init_shader_cache(struct si_screen *sscreen)
{
- pipe_mutex_init(sscreen->shader_cache_mutex);
+ (void) mtx_init(&sscreen->shader_cache_mutex, mtx_plain);
sscreen->shader_cache =
_mesa_hash_table_create(NULL,
si_shader_cache_key_hash,
si_shader_cache_key_equals);
+
return sscreen->shader_cache != NULL;
}
if (sscreen->shader_cache)
_mesa_hash_table_destroy(sscreen->shader_cache,
si_destroy_shader_cache_entry);
- pipe_mutex_destroy(sscreen->shader_cache_mutex);
+ mtx_destroy(&sscreen->shader_cache_mutex);
}
/* SHADER STATES */
S_028B6C_DISTRIBUTION_MODE(distribution_mode));
}
+/* Polaris needs different VTX_REUSE_DEPTH settings depending on
+ * whether the "fractional odd" tessellation spacing is used.
+ *
+ * Possible VGT configurations and which state should set the register:
+ *
+ * Reg set in | VGT shader configuration | Value
+ * ------------------------------------------------------
+ * VS as VS | VS | 30
+ * VS as ES | ES -> GS -> VS | 30
+ * TES as VS | LS -> HS -> VS | 14 or 30
+ * TES as ES | LS -> HS -> ES -> GS -> VS | 14 or 30
+ */
+static void polaris_set_vgt_vertex_reuse(struct si_screen *sscreen,
+ struct si_shader *shader,
+ struct si_pm4_state *pm4)
+{
+ unsigned type = shader->selector->type;
+
+ if (sscreen->b.family < CHIP_POLARIS10)
+ return;
+
+ /* VS as VS, or VS as ES: */
+ if ((type == PIPE_SHADER_VERTEX &&
+ !shader->key.as_ls &&
+ !shader->is_gs_copy_shader) ||
+ /* TES as VS, or TES as ES: */
+ type == PIPE_SHADER_TESS_EVAL) {
+ unsigned vtx_reuse_depth = 30;
+
+ if (type == PIPE_SHADER_TESS_EVAL &&
+ shader->selector->info.properties[TGSI_PROPERTY_TES_SPACING] ==
+ PIPE_TESS_SPACING_FRACTIONAL_ODD)
+ vtx_reuse_depth = 14;
+
+ si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL,
+ vtx_reuse_depth);
+ }
+}
+
static struct si_pm4_state *si_get_shader_pm4_state(struct si_shader *shader)
{
if (shader->pm4)
if (shader->selector->type == PIPE_SHADER_TESS_EVAL)
si_set_tesseval_regs(sscreen, shader, pm4);
+
+ polaris_set_vgt_vertex_reuse(sscreen, shader, pm4);
}
/**
static void si_shader_gs(struct si_shader *shader)
{
- unsigned gs_vert_itemsize = shader->selector->gsvs_vertex_size;
- unsigned gsvs_itemsize = shader->selector->max_gsvs_emit_size >> 2;
- unsigned gs_num_invocations = shader->selector->gs_num_invocations;
+ struct si_shader_selector *sel = shader->selector;
+ const ubyte *num_components = sel->info.num_stream_output_components;
+ unsigned gs_num_invocations = sel->gs_num_invocations;
struct si_pm4_state *pm4;
uint64_t va;
- unsigned max_stream = shader->selector->max_gs_stream;
-
- /* The GSVS_RING_ITEMSIZE register takes 15 bits */
- assert(gsvs_itemsize < (1 << 15));
+ unsigned max_stream = sel->max_gs_stream;
+ unsigned offset;
pm4 = si_get_shader_pm4_state(shader);
if (!pm4)
si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE, si_vgt_gs_mode(shader->selector));
- si_pm4_set_reg(pm4, R_028A60_VGT_GSVS_RING_OFFSET_1, gsvs_itemsize);
- si_pm4_set_reg(pm4, R_028A64_VGT_GSVS_RING_OFFSET_2, gsvs_itemsize * ((max_stream >= 2) ? 2 : 1));
- si_pm4_set_reg(pm4, R_028A68_VGT_GSVS_RING_OFFSET_3, gsvs_itemsize * ((max_stream >= 3) ? 3 : 1));
+ offset = num_components[0] * sel->gs_max_out_vertices;
+ si_pm4_set_reg(pm4, R_028A60_VGT_GSVS_RING_OFFSET_1, offset);
+ if (max_stream >= 1)
+ offset += num_components[1] * sel->gs_max_out_vertices;
+ si_pm4_set_reg(pm4, R_028A64_VGT_GSVS_RING_OFFSET_2, offset);
+ if (max_stream >= 2)
+ offset += num_components[2] * sel->gs_max_out_vertices;
+ si_pm4_set_reg(pm4, R_028A68_VGT_GSVS_RING_OFFSET_3, offset);
+ if (max_stream >= 3)
+ offset += num_components[3] * sel->gs_max_out_vertices;
+ si_pm4_set_reg(pm4, R_028AB0_VGT_GSVS_RING_ITEMSIZE, offset);
- si_pm4_set_reg(pm4, R_028AB0_VGT_GSVS_RING_ITEMSIZE, gsvs_itemsize * (max_stream + 1));
+ /* The GSVS_RING_ITEMSIZE register takes 15 bits */
+ assert(offset < (1 << 15));
si_pm4_set_reg(pm4, R_028B38_VGT_GS_MAX_VERT_OUT, shader->selector->gs_max_out_vertices);
- si_pm4_set_reg(pm4, R_028B5C_VGT_GS_VERT_ITEMSIZE, gs_vert_itemsize >> 2);
- si_pm4_set_reg(pm4, R_028B60_VGT_GS_VERT_ITEMSIZE_1, (max_stream >= 1) ? gs_vert_itemsize >> 2 : 0);
- si_pm4_set_reg(pm4, R_028B64_VGT_GS_VERT_ITEMSIZE_2, (max_stream >= 2) ? gs_vert_itemsize >> 2 : 0);
- si_pm4_set_reg(pm4, R_028B68_VGT_GS_VERT_ITEMSIZE_3, (max_stream >= 3) ? gs_vert_itemsize >> 2 : 0);
+ si_pm4_set_reg(pm4, R_028B5C_VGT_GS_VERT_ITEMSIZE, num_components[0]);
+ si_pm4_set_reg(pm4, R_028B60_VGT_GS_VERT_ITEMSIZE_1, (max_stream >= 1) ? num_components[1] : 0);
+ si_pm4_set_reg(pm4, R_028B64_VGT_GS_VERT_ITEMSIZE_2, (max_stream >= 2) ? num_components[2] : 0);
+ si_pm4_set_reg(pm4, R_028B68_VGT_GS_VERT_ITEMSIZE_3, (max_stream >= 3) ? num_components[3] : 0);
si_pm4_set_reg(pm4, R_028B90_VGT_GS_INSTANCE_CNT,
S_028B90_CNT(MIN2(gs_num_invocations, 127)) |
if (shader->selector->type == PIPE_SHADER_TESS_EVAL)
si_set_tesseval_regs(sscreen, shader, pm4);
+
+ polaris_set_vgt_vertex_reuse(sscreen, shader, pm4);
}
static unsigned si_get_ps_num_interp(struct si_shader *ps)
return PIPE_FUNC_ALWAYS;
}
+static void si_shader_selector_key_hw_vs(struct si_context *sctx,
+ struct si_shader_selector *vs,
+ struct si_shader_key *key)
+{
+ struct si_shader_selector *ps = sctx->ps_shader.cso;
+
+ key->opt.hw_vs.clip_disable =
+ sctx->queued.named.rasterizer->clip_plane_enable == 0 &&
+ (vs->info.clipdist_writemask ||
+ vs->info.writes_clipvertex) &&
+ !vs->info.culldist_writemask;
+
+ /* Find out if PS is disabled. */
+ bool ps_disabled = true;
+ if (ps) {
+ bool ps_modifies_zs = ps->info.uses_kill ||
+ ps->info.writes_z ||
+ ps->info.writes_stencil ||
+ ps->info.writes_samplemask ||
+ si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS;
+
+ unsigned ps_colormask = sctx->framebuffer.colorbuf_enabled_4bit &
+ sctx->queued.named.blend->cb_target_mask;
+ if (!ps->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
+ ps_colormask &= ps->colors_written_4bit;
+
+ ps_disabled = sctx->queued.named.rasterizer->rasterizer_discard ||
+ (!ps_colormask &&
+ !ps_modifies_zs &&
+ !ps->info.writes_memory);
+ }
+
+ /* Find out which VS outputs aren't used by the PS. */
+ uint64_t outputs_written = vs->outputs_written;
+ uint32_t outputs_written2 = vs->outputs_written2;
+ uint64_t inputs_read = 0;
+ uint32_t inputs_read2 = 0;
+
+ outputs_written &= ~0x3; /* ignore POSITION, PSIZE */
+
+ if (!ps_disabled) {
+ inputs_read = ps->inputs_read;
+ inputs_read2 = ps->inputs_read2;
+ }
+
+ uint64_t linked = outputs_written & inputs_read;
+ uint32_t linked2 = outputs_written2 & inputs_read2;
+
+ key->opt.hw_vs.kill_outputs = ~linked & outputs_written;
+ key->opt.hw_vs.kill_outputs2 = ~linked2 & outputs_written2;
+}
+
/* Compute the key for the hw shader variant */
static inline void si_shader_selector_key(struct pipe_context *ctx,
struct si_shader_selector *sel,
key->part.vs.prolog.instance_divisors[i] =
sctx->vertex_elements->elements[i].instance_divisor;
- key->mono.vs.fix_fetch =
- sctx->vertex_elements->fix_fetch &
- u_bit_consecutive(0, 2 * count);
+ memcpy(key->mono.vs.fix_fetch,
+ sctx->vertex_elements->fix_fetch, count);
}
if (sctx->tes_shader.cso)
key->as_ls = 1;
else if (sctx->gs_shader.cso)
key->as_es = 1;
else {
+ si_shader_selector_key_hw_vs(sctx, sel, key);
+
if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid)
key->part.vs.epilog.export_prim_id = 1;
}
case PIPE_SHADER_TESS_CTRL:
key->part.tcs.epilog.prim_mode =
sctx->tes_shader.cso->info.properties[TGSI_PROPERTY_TES_PRIM_MODE];
+ key->part.tcs.epilog.tes_reads_tess_factors =
+ sctx->tes_shader.cso->info.reads_tess_factors;
if (sel == sctx->fixed_func_tcs_shader.cso)
key->mono.tcs.inputs_to_copy = sctx->vs_shader.cso->outputs_written;
case PIPE_SHADER_TESS_EVAL:
if (sctx->gs_shader.cso)
key->as_es = 1;
- else if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid)
- key->part.tes.epilog.export_prim_id = 1;
+ else {
+ si_shader_selector_key_hw_vs(sctx, sel, key);
+
+ if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid)
+ key->part.tes.epilog.export_prim_id = 1;
+ }
break;
case PIPE_SHADER_GEOMETRY:
key->part.gs.prolog.tri_strip_adj_fix = sctx->gs_tri_strip_adj_fix;
* to the range supported by the type if a channel has less
* than 16 bits and the export format is 16_ABGR.
*/
- if (sctx->b.chip_class <= CIK && sctx->b.family != CHIP_HAWAII)
+ if (sctx->b.chip_class <= CIK && sctx->b.family != CHIP_HAWAII) {
key->part.ps.epilog.color_is_int8 = sctx->framebuffer.color_is_int8;
+ key->part.ps.epilog.color_is_int10 = sctx->framebuffer.color_is_int10;
+ }
/* Disable unwritten outputs (if WRITE_ALL_CBUFS isn't enabled). */
if (!key->part.ps.epilog.last_cbuf) {
key->part.ps.epilog.spi_shader_col_format &= sel->colors_written_4bit;
key->part.ps.epilog.color_is_int8 &= sel->info.colors_written;
+ key->part.ps.epilog.color_is_int10 &= sel->info.colors_written;
}
if (rs) {
}
}
+static void si_build_shader_variant(void *job, int thread_index)
+{
+ struct si_shader *shader = (struct si_shader *)job;
+ struct si_shader_selector *sel = shader->selector;
+ struct si_screen *sscreen = sel->screen;
+ LLVMTargetMachineRef tm;
+ struct pipe_debug_callback *debug = &shader->compiler_ctx_state.debug;
+ int r;
+
+ if (thread_index >= 0) {
+ assert(thread_index < ARRAY_SIZE(sscreen->tm));
+ tm = sscreen->tm[thread_index];
+ if (!debug->async)
+ debug = NULL;
+ } else {
+ tm = shader->compiler_ctx_state.tm;
+ }
+
+ r = si_shader_create(sscreen, tm, shader, debug);
+ if (unlikely(r)) {
+ R600_ERR("Failed to build shader variant (type=%u) %d\n",
+ sel->type, r);
+ shader->compilation_failed = true;
+ return;
+ }
+
+ if (shader->compiler_ctx_state.is_debug_context) {
+ FILE *f = open_memstream(&shader->shader_log,
+ &shader->shader_log_size);
+ if (f) {
+ si_shader_dump(sscreen, shader, NULL, sel->type, f, false);
+ fclose(f);
+ }
+ }
+
+ si_shader_init_pm4_state(sscreen, shader);
+}
+
/* Select the hw shader variant depending on the current state. */
static int si_shader_select_with_key(struct si_screen *sscreen,
struct si_shader_ctx_state *state,
+ struct si_compiler_ctx_state *compiler_state,
struct si_shader_key *key,
- LLVMTargetMachineRef tm,
- struct pipe_debug_callback *debug,
- bool wait,
- bool is_debug_context)
+ int thread_index)
{
static const struct si_shader_key zeroed;
struct si_shader_selector *sel = state->cso;
struct si_shader *current = state->current;
struct si_shader *iter, *shader = NULL;
- int r;
+ if (unlikely(sscreen->b.debug_flags & DBG_NO_OPT_VARIANT)) {
+ memset(&key->opt, 0, sizeof(key->opt));
+ }
+
+again:
/* Check if we don't need to change anything.
* This path is also used for most shaders that don't need multiple
* variants, it will cost just a computation of the key and this
* test. */
- if (likely(current && memcmp(¤t->key, key, sizeof(*key)) == 0))
+ if (likely(current &&
+ memcmp(¤t->key, key, sizeof(*key)) == 0 &&
+ (!current->is_optimized ||
+ util_queue_fence_is_signalled(¤t->optimized_ready))))
return 0;
/* This must be done before the mutex is locked, because async GS
* compilation calls this function too, and therefore must enter
* the mutex first.
+ *
+ * Only wait if we are in a draw call. Don't wait if we are
+ * in a compiler thread.
*/
- if (wait)
- util_queue_job_wait(&sel->ready);
+ if (thread_index < 0)
+ util_queue_fence_wait(&sel->ready);
- pipe_mutex_lock(sel->mutex);
+ mtx_lock(&sel->mutex);
/* Find the shader variant. */
for (iter = sel->first_variant; iter; iter = iter->next_variant) {
/* Don't check the "current" shader. We checked it above. */
if (current != iter &&
memcmp(&iter->key, key, sizeof(*key)) == 0) {
+ /* If it's an optimized shader and its compilation has
+ * been started but isn't done, use the unoptimized
+ * shader so as not to cause a stall due to compilation.
+ */
+ if (iter->is_optimized &&
+ !util_queue_fence_is_signalled(&iter->optimized_ready)) {
+ memset(&key->opt, 0, sizeof(key->opt));
+ pipe_mutex_unlock(sel->mutex);
+ goto again;
+ }
+
+ if (iter->compilation_failed) {
+ pipe_mutex_unlock(sel->mutex);
+ return -1; /* skip the draw call */
+ }
+
state->current = iter;
pipe_mutex_unlock(sel->mutex);
return 0;
}
shader->selector = sel;
shader->key = *key;
- shader->is_monolithic =
- !sel->main_shader_part ||
- sel->main_shader_part->key.as_ls != key->as_ls ||
- sel->main_shader_part->key.as_es != key->as_es ||
+ shader->compiler_ctx_state = *compiler_state;
+
+ /* Compile the main shader part if it doesn't exist. This can happen
+ * if the initial guess was wrong. */
+ struct si_shader **mainp = si_get_main_shader_part(sel, key);
+ bool is_pure_monolithic =
+ sscreen->use_monolithic_shaders ||
memcmp(&key->mono, &zeroed.mono, sizeof(key->mono)) != 0;
- r = si_shader_create(sscreen, tm, shader, debug);
- if (unlikely(r)) {
- R600_ERR("Failed to build shader variant (type=%u) %d\n",
- sel->type, r);
- FREE(shader);
- pipe_mutex_unlock(sel->mutex);
- return r;
- }
+ if (!*mainp && !is_pure_monolithic) {
+ struct si_shader *main_part = CALLOC_STRUCT(si_shader);
- if (is_debug_context) {
- FILE *f = open_memstream(&shader->shader_log,
- &shader->shader_log_size);
- if (f) {
- si_shader_dump(sscreen, shader, NULL, sel->type, f);
- fclose(f);
+ if (!main_part) {
+ FREE(shader);
+ pipe_mutex_unlock(sel->mutex);
+ return -ENOMEM; /* skip the draw call */
}
+
+ main_part->selector = sel;
+ main_part->key.as_es = key->as_es;
+ main_part->key.as_ls = key->as_ls;
+
+ if (si_compile_tgsi_shader(sscreen, compiler_state->tm,
+ main_part, false,
+ &compiler_state->debug) != 0) {
+ FREE(main_part);
+ FREE(shader);
+ pipe_mutex_unlock(sel->mutex);
+ return -ENOMEM; /* skip the draw call */
+ }
+ *mainp = main_part;
}
- si_shader_init_pm4_state(sscreen, shader);
+ /* Monolithic-only shaders don't make a distinction between optimized
+ * and unoptimized. */
+ shader->is_monolithic =
+ is_pure_monolithic ||
+ memcmp(&key->opt, &zeroed.opt, sizeof(key->opt)) != 0;
+
+ shader->is_optimized =
+ !is_pure_monolithic &&
+ memcmp(&key->opt, &zeroed.opt, sizeof(key->opt)) != 0;
+ if (shader->is_optimized)
+ util_queue_fence_init(&shader->optimized_ready);
if (!sel->last_variant) {
sel->first_variant = shader;
sel->last_variant->next_variant = shader;
sel->last_variant = shader;
}
- state->current = shader;
+
+ /* If it's an optimized shader, compile it asynchronously. */
+ if (shader->is_optimized &&
+ !is_pure_monolithic &&
+ thread_index < 0) {
+ /* Compile it asynchronously. */
+ util_queue_add_job(&sscreen->shader_compiler_queue,
+ shader, &shader->optimized_ready,
+ si_build_shader_variant, NULL);
+
+ /* Use the default (unoptimized) shader for now. */
+ memset(&key->opt, 0, sizeof(key->opt));
+ pipe_mutex_unlock(sel->mutex);
+ goto again;
+ }
+
+ assert(!shader->is_optimized);
+ si_build_shader_variant(shader, thread_index);
+
+ if (!shader->compilation_failed)
+ state->current = shader;
+
pipe_mutex_unlock(sel->mutex);
- return 0;
+ return shader->compilation_failed ? -1 : 0;
}
static int si_shader_select(struct pipe_context *ctx,
- struct si_shader_ctx_state *state)
+ struct si_shader_ctx_state *state,
+ struct si_compiler_ctx_state *compiler_state)
{
struct si_context *sctx = (struct si_context *)ctx;
struct si_shader_key key;
si_shader_selector_key(ctx, state->cso, &key);
- return si_shader_select_with_key(sctx->screen, state, &key,
- sctx->tm, &sctx->b.debug, true,
- sctx->is_debug);
+ return si_shader_select_with_key(sctx->screen, state, compiler_state,
+ &key, -1);
}
static void si_parse_next_shader_property(const struct tgsi_shader_info *info,
break;
case PIPE_SHADER_TESS_EVAL:
- if (next_shader == PIPE_SHADER_GEOMETRY)
+ if (next_shader == PIPE_SHADER_GEOMETRY ||
+ !info->writes_position)
key->as_es = 1;
break;
}
struct si_shader_selector *sel = (struct si_shader_selector *)job;
struct si_screen *sscreen = sel->screen;
LLVMTargetMachineRef tm;
- struct pipe_debug_callback *debug = &sel->debug;
+ struct pipe_debug_callback *debug = &sel->compiler_ctx_state.debug;
unsigned i;
if (thread_index >= 0) {
if (!debug->async)
debug = NULL;
} else {
- tm = sel->tm;
+ tm = sel->compiler_ctx_state.tm;
}
/* Compile the main shader part for use with a prolog and/or epilog.
tgsi_binary = si_get_tgsi_binary(sel);
/* Try to load the shader from the shader cache. */
- pipe_mutex_lock(sscreen->shader_cache_mutex);
+ mtx_lock(&sscreen->shader_cache_mutex);
if (tgsi_binary &&
si_shader_cache_load_shader(sscreen, tgsi_binary, shader)) {
- FREE(tgsi_binary);
pipe_mutex_unlock(sscreen->shader_cache_mutex);
} else {
pipe_mutex_unlock(sscreen->shader_cache_mutex);
}
if (tgsi_binary) {
- pipe_mutex_lock(sscreen->shader_cache_mutex);
- if (!si_shader_cache_insert_shader(sscreen, tgsi_binary, shader))
+ mtx_lock(&sscreen->shader_cache_mutex);
+ if (!si_shader_cache_insert_shader(sscreen, tgsi_binary, shader, true))
FREE(tgsi_binary);
pipe_mutex_unlock(sscreen->shader_cache_mutex);
}
}
- sel->main_shader_part = shader;
+ *si_get_main_shader_part(sel, &shader->key) = shader;
+
+ /* Unset "outputs_written" flags for outputs converted to
+ * DEFAULT_VAL, so that later inter-shader optimizations don't
+ * try to eliminate outputs that don't exist in the final
+ * shader.
+ *
+ * This is only done if non-monolithic shaders are enabled.
+ */
+ if ((sel->type == PIPE_SHADER_VERTEX ||
+ sel->type == PIPE_SHADER_TESS_EVAL) &&
+ !shader->key.as_ls &&
+ !shader->key.as_es) {
+ unsigned i;
+
+ for (i = 0; i < sel->info.num_outputs; i++) {
+ unsigned offset = shader->info.vs_output_param_offset[i];
+
+ if (offset <= EXP_PARAM_OFFSET_31)
+ continue;
+
+ unsigned name = sel->info.output_semantic_name[i];
+ unsigned index = sel->info.output_semantic_index[i];
+ unsigned id;
+
+ switch (name) {
+ case TGSI_SEMANTIC_GENERIC:
+ /* don't process indices the function can't handle */
+ if (index >= 60)
+ break;
+ /* fall through */
+ case TGSI_SEMANTIC_CLIPDIST:
+ id = si_shader_io_get_unique_index(name, index);
+ sel->outputs_written &= ~(1ull << id);
+ break;
+ case TGSI_SEMANTIC_POSITION: /* ignore these */
+ case TGSI_SEMANTIC_PSIZE:
+ case TGSI_SEMANTIC_CLIPVERTEX:
+ case TGSI_SEMANTIC_EDGEFLAG:
+ break;
+ default:
+ id = si_shader_io_get_unique_index2(name, index);
+ sel->outputs_written2 &= ~(1u << id);
+ }
+ }
+ }
}
/* Pre-compilation. */
break;
}
- if (si_shader_select_with_key(sscreen, &state, &key, tm, debug,
- false, sel->is_debug_context))
+ if (si_shader_select_with_key(sscreen, &state,
+ &sel->compiler_ctx_state, &key,
+ thread_index))
fprintf(stderr, "radeonsi: can't create a monolithic shader\n");
}
return NULL;
sel->screen = sscreen;
- sel->tm = sctx->tm;
- sel->debug = sctx->b.debug;
- sel->is_debug_context = sctx->is_debug;
+ sel->compiler_ctx_state.tm = sctx->tm;
+ sel->compiler_ctx_state.debug = sctx->b.debug;
+ sel->compiler_ctx_state.is_debug_context = sctx->is_debug;
sel->tokens = tgsi_dup_tokens(state->tokens);
if (!sel->tokens) {
FREE(sel);
sel->patch_outputs_written |=
1llu << si_shader_io_get_unique_index(name, index);
break;
- default:
+
+ case TGSI_SEMANTIC_GENERIC:
+ /* don't process indices the function can't handle */
+ if (index >= 60)
+ break;
+ /* fall through */
+ case TGSI_SEMANTIC_POSITION:
+ case TGSI_SEMANTIC_PSIZE:
+ case TGSI_SEMANTIC_CLIPDIST:
sel->outputs_written |=
1llu << si_shader_io_get_unique_index(name, index);
+ break;
+ case TGSI_SEMANTIC_CLIPVERTEX: /* ignore these */
+ case TGSI_SEMANTIC_EDGEFLAG:
+ break;
+ default:
+ sel->outputs_written2 |=
+ 1u << si_shader_io_get_unique_index2(name, index);
}
}
sel->esgs_itemsize = util_last_bit64(sel->outputs_written) * 16;
break;
case PIPE_SHADER_FRAGMENT:
+ for (i = 0; i < sel->info.num_inputs; i++) {
+ unsigned name = sel->info.input_semantic_name[i];
+ unsigned index = sel->info.input_semantic_index[i];
+
+ switch (name) {
+ case TGSI_SEMANTIC_CLIPDIST:
+ case TGSI_SEMANTIC_GENERIC:
+ sel->inputs_read |=
+ 1llu << si_shader_io_get_unique_index(name, index);
+ break;
+ case TGSI_SEMANTIC_PCOORD: /* ignore this */
+ break;
+ default:
+ sel->inputs_read2 |=
+ 1u << si_shader_io_get_unique_index2(name, index);
+ }
+ }
+
for (i = 0; i < 8; i++)
if (sel->info.colors_written & (1 << i))
sel->colors_written_4bit |= 0xf << (4 * i);
sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
}
- pipe_mutex_init(sel->mutex);
+ (void) mtx_init(&sel->mutex, mtx_plain);
util_queue_fence_init(&sel->ready);
if ((sctx->b.debug.debug_message && !sctx->b.debug.async) ||
sctx->gs_shader.cso = sel;
sctx->gs_shader.current = sel ? sel->first_variant : NULL;
+ sctx->ia_multi_vgt_param_key.u.uses_gs = sel != NULL;
sctx->do_update_shaders = true;
si_mark_atom_dirty(sctx, &sctx->clip_regs);
sctx->last_rast_prim = -1; /* reset this so that it gets updated */
r600_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx));
}
+static void si_update_tcs_tes_uses_prim_id(struct si_context *sctx)
+{
+ sctx->ia_multi_vgt_param_key.u.tcs_tes_uses_prim_id =
+ (sctx->tes_shader.cso &&
+ sctx->tes_shader.cso->info.uses_primid) ||
+ (sctx->tcs_shader.cso &&
+ sctx->tcs_shader.cso->info.uses_primid);
+}
+
static void si_bind_tcs_shader(struct pipe_context *ctx, void *state)
{
struct si_context *sctx = (struct si_context *)ctx;
sctx->tcs_shader.cso = sel;
sctx->tcs_shader.current = sel ? sel->first_variant : NULL;
+ si_update_tcs_tes_uses_prim_id(sctx);
sctx->do_update_shaders = true;
if (enable_changed)
sctx->tes_shader.cso = sel;
sctx->tes_shader.current = sel ? sel->first_variant : NULL;
+ sctx->ia_multi_vgt_param_key.u.uses_tess = sel != NULL;
+ si_update_tcs_tes_uses_prim_id(sctx);
sctx->do_update_shaders = true;
si_mark_atom_dirty(sctx, &sctx->clip_regs);
sctx->last_rast_prim = -1; /* reset this so that it gets updated */
static void si_delete_shader(struct si_context *sctx, struct si_shader *shader)
{
+ if (shader->is_optimized) {
+ util_queue_fence_wait(&shader->optimized_ready);
+ util_queue_fence_destroy(&shader->optimized_ready);
+ }
+
if (shader->pm4) {
switch (shader->selector->type) {
case PIPE_SHADER_VERTEX:
[PIPE_SHADER_FRAGMENT] = &sctx->ps_shader,
};
- util_queue_job_wait(&sel->ready);
+ util_queue_fence_wait(&sel->ready);
if (current_shader[sel->type]->cso == sel) {
current_shader[sel->type]->cso = NULL;
if (sel->main_shader_part)
si_delete_shader(sctx, sel->main_shader_part);
+ if (sel->main_shader_part_ls)
+ si_delete_shader(sctx, sel->main_shader_part_ls);
+ if (sel->main_shader_part_es)
+ si_delete_shader(sctx, sel->main_shader_part_es);
if (sel->gs_copy_shader)
si_delete_shader(sctx, sel->gs_copy_shader);
util_queue_fence_destroy(&sel->ready);
- pipe_mutex_destroy(sel->mutex);
+ mtx_destroy(&sel->mutex);
free(sel->tokens);
free(sel);
}
/* The input is loaded from parameter memory. */
ps_input_cntl |= S_028644_OFFSET(offset);
} else if (!G_028644_PT_SPRITE_TEX(ps_input_cntl)) {
- /* The input is a DEFAULT_VAL constant. */
- assert(offset >= EXP_PARAM_DEFAULT_VAL_0000 &&
- offset <= EXP_PARAM_DEFAULT_VAL_1111);
+ if (offset == EXP_PARAM_UNDEFINED) {
+ /* This can happen with depth-only rendering. */
+ offset = 0;
+ } else {
+ /* The input is a DEFAULT_VAL constant. */
+ assert(offset >= EXP_PARAM_DEFAULT_VAL_0000 &&
+ offset <= EXP_PARAM_DEFAULT_VAL_1111);
+ offset -= EXP_PARAM_DEFAULT_VAL_0000;
+ }
- offset -= EXP_PARAM_DEFAULT_VAL_0000;
ps_input_cntl = S_028644_OFFSET(0x20) |
S_028644_DEFAULT_VAL(offset);
}
unsigned esgs_ring_size = max_gs_waves * 2 * wave_size *
es->esgs_itemsize * gs->gs_input_verts_per_prim;
unsigned gsvs_ring_size = max_gs_waves * 2 * wave_size *
- gs->max_gsvs_emit_size * (gs->max_gs_stream + 1);
+ gs->max_gsvs_emit_size;
min_esgs_ring_size = align(min_esgs_ring_size, alignment);
esgs_ring_size = align(esgs_ring_size, alignment);
if (update_esgs) {
pipe_resource_reference(&sctx->esgs_ring, NULL);
- sctx->esgs_ring = pipe_buffer_create(sctx->b.b.screen, 0,
- PIPE_USAGE_DEFAULT,
- esgs_ring_size);
+ sctx->esgs_ring =
+ r600_aligned_buffer_create(sctx->b.b.screen,
+ R600_RESOURCE_FLAG_UNMAPPABLE,
+ PIPE_USAGE_DEFAULT,
+ esgs_ring_size, alignment);
if (!sctx->esgs_ring)
return false;
}
if (update_gsvs) {
pipe_resource_reference(&sctx->gsvs_ring, NULL);
- sctx->gsvs_ring = pipe_buffer_create(sctx->b.b.screen, 0,
- PIPE_USAGE_DEFAULT,
- gsvs_ring_size);
+ sctx->gsvs_ring =
+ r600_aligned_buffer_create(sctx->b.b.screen,
+ R600_RESOURCE_FLAG_UNMAPPABLE,
+ PIPE_USAGE_DEFAULT,
+ gsvs_ring_size, alignment);
if (!sctx->gsvs_ring)
return false;
}
sctx->esgs_ring, 0, sctx->esgs_ring->width0,
false, false, 0, 0, 0);
}
- if (sctx->gsvs_ring)
- si_set_ring_buffer(&sctx->b.b, SI_VS_RING_GSVS,
+ if (sctx->gsvs_ring) {
+ si_set_ring_buffer(&sctx->b.b, SI_RING_GSVS,
sctx->gsvs_ring, 0, sctx->gsvs_ring->width0,
false, false, 0, 0, 0);
- return true;
-}
-
-static void si_update_gsvs_ring_bindings(struct si_context *sctx)
-{
- unsigned gsvs_itemsize = sctx->gs_shader.cso->max_gsvs_emit_size;
- uint64_t offset;
-
- if (!sctx->gsvs_ring || gsvs_itemsize == sctx->last_gsvs_itemsize)
- return;
-
- sctx->last_gsvs_itemsize = gsvs_itemsize;
-
- si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS0,
- sctx->gsvs_ring, gsvs_itemsize,
- 64, true, true, 4, 16, 0);
-
- offset = gsvs_itemsize * 64;
- si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS1,
- sctx->gsvs_ring, gsvs_itemsize,
- 64, true, true, 4, 16, offset);
-
- offset = (gsvs_itemsize * 2) * 64;
- si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS2,
- sctx->gsvs_ring, gsvs_itemsize,
- 64, true, true, 4, 16, offset);
+ }
- offset = (gsvs_itemsize * 3) * 64;
- si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS3,
- sctx->gsvs_ring, gsvs_itemsize,
- 64, true, true, 4, 16, offset);
+ return true;
}
/**
r600_resource_reference(&sctx->scratch_buffer, NULL);
sctx->scratch_buffer = (struct r600_resource*)
- pipe_buffer_create(&sctx->screen->b.b, 0,
- PIPE_USAGE_DEFAULT, scratch_needed_size);
+ r600_aligned_buffer_create(&sctx->screen->b.b,
+ R600_RESOURCE_FLAG_UNMAPPABLE,
+ PIPE_USAGE_DEFAULT,
+ scratch_needed_size, 256);
if (!sctx->scratch_buffer)
return false;
- sctx->emit_scratch_reloc = true;
+
+ si_mark_atom_dirty(sctx, &sctx->scratch_state);
+ r600_context_add_resource_size(&sctx->b.b,
+ &sctx->scratch_buffer->b.b);
}
/* Update the shaders, so they are using the latest scratch. The
S_0286E8_WAVESIZE(scratch_bytes_per_wave >> 10);
if (spi_tmpring_size != sctx->spi_tmpring_size) {
sctx->spi_tmpring_size = spi_tmpring_size;
- sctx->emit_scratch_reloc = true;
+ si_mark_atom_dirty(sctx, &sctx->scratch_state);
}
return true;
}
static void si_init_tess_factor_ring(struct si_context *sctx)
{
- bool double_offchip_buffers = sctx->b.chip_class >= CIK;
+ bool double_offchip_buffers = sctx->b.chip_class >= CIK &&
+ sctx->b.family != CHIP_CARRIZO &&
+ sctx->b.family != CHIP_STONEY;
unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
unsigned max_offchip_buffers = max_offchip_buffers_per_se *
sctx->screen->b.info.max_se;
}
assert(!sctx->tf_ring);
- sctx->tf_ring = pipe_buffer_create(sctx->b.b.screen, 0,
- PIPE_USAGE_DEFAULT,
- 32768 * sctx->screen->b.info.max_se);
+ sctx->tf_ring = r600_aligned_buffer_create(sctx->b.b.screen,
+ R600_RESOURCE_FLAG_UNMAPPABLE,
+ PIPE_USAGE_DEFAULT,
+ 32768 * sctx->screen->b.info.max_se,
+ 256);
if (!sctx->tf_ring)
return;
assert(((sctx->tf_ring->width0 / 4) & C_030938_SIZE) == 0);
- sctx->tess_offchip_ring = pipe_buffer_create(sctx->b.b.screen, 0,
- PIPE_USAGE_DEFAULT,
- max_offchip_buffers *
- sctx->screen->tess_offchip_block_dw_size * 4);
+ sctx->tess_offchip_ring =
+ r600_aligned_buffer_create(sctx->b.b.screen,
+ R600_RESOURCE_FLAG_UNMAPPABLE,
+ PIPE_USAGE_DEFAULT,
+ max_offchip_buffers *
+ sctx->screen->tess_offchip_block_dw_size * 4,
+ 256);
if (!sctx->tess_offchip_ring)
return;
bool si_update_shaders(struct si_context *sctx)
{
struct pipe_context *ctx = (struct pipe_context*)sctx;
+ struct si_compiler_ctx_state compiler_state;
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
+ struct si_shader *old_vs = si_get_vs_state(sctx);
+ bool old_clip_disable = old_vs ? old_vs->key.opt.hw_vs.clip_disable : false;
int r;
+ compiler_state.tm = sctx->tm;
+ compiler_state.debug = sctx->b.debug;
+ compiler_state.is_debug_context = sctx->is_debug;
+
/* Update stages before GS. */
if (sctx->tes_shader.cso) {
if (!sctx->tf_ring) {
}
/* VS as LS */
- r = si_shader_select(ctx, &sctx->vs_shader);
+ r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state);
if (r)
return false;
si_pm4_bind_state(sctx, ls, sctx->vs_shader.current->pm4);
if (sctx->tcs_shader.cso) {
- r = si_shader_select(ctx, &sctx->tcs_shader);
+ r = si_shader_select(ctx, &sctx->tcs_shader,
+ &compiler_state);
if (r)
return false;
si_pm4_bind_state(sctx, hs, sctx->tcs_shader.current->pm4);
return false;
}
- r = si_shader_select(ctx, &sctx->fixed_func_tcs_shader);
+ r = si_shader_select(ctx, &sctx->fixed_func_tcs_shader,
+ &compiler_state);
if (r)
return false;
si_pm4_bind_state(sctx, hs,
sctx->fixed_func_tcs_shader.current->pm4);
}
- r = si_shader_select(ctx, &sctx->tes_shader);
+ r = si_shader_select(ctx, &sctx->tes_shader, &compiler_state);
if (r)
return false;
}
} else if (sctx->gs_shader.cso) {
/* VS as ES */
- r = si_shader_select(ctx, &sctx->vs_shader);
+ r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state);
if (r)
return false;
si_pm4_bind_state(sctx, es, sctx->vs_shader.current->pm4);
+
+ si_pm4_bind_state(sctx, ls, NULL);
+ si_pm4_bind_state(sctx, hs, NULL);
} else {
/* VS as VS */
- r = si_shader_select(ctx, &sctx->vs_shader);
+ r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state);
if (r)
return false;
si_pm4_bind_state(sctx, vs, sctx->vs_shader.current->pm4);
si_update_so(sctx, sctx->vs_shader.cso);
+
+ si_pm4_bind_state(sctx, ls, NULL);
+ si_pm4_bind_state(sctx, hs, NULL);
}
/* Update GS. */
if (sctx->gs_shader.cso) {
- r = si_shader_select(ctx, &sctx->gs_shader);
+ r = si_shader_select(ctx, &sctx->gs_shader, &compiler_state);
if (r)
return false;
si_pm4_bind_state(sctx, gs, sctx->gs_shader.current->pm4);
if (!si_update_gs_ring_buffers(sctx))
return false;
-
- si_update_gsvs_ring_bindings(sctx);
} else {
si_pm4_bind_state(sctx, gs, NULL);
si_pm4_bind_state(sctx, es, NULL);
si_update_vgt_shader_config(sctx);
+ if (old_clip_disable != si_get_vs_state(sctx)->key.opt.hw_vs.clip_disable)
+ si_mark_atom_dirty(sctx, &sctx->clip_regs);
+
if (sctx->ps_shader.cso) {
unsigned db_shader_control;
- r = si_shader_select(ctx, &sctx->ps_shader);
+ r = si_shader_select(ctx, &sctx->ps_shader, &compiler_state);
if (r)
return false;
si_pm4_bind_state(sctx, ps, sctx->ps_shader.current->pm4);
return false;
}
+ if (sctx->b.chip_class >= CIK)
+ si_mark_atom_dirty(sctx, &sctx->prefetch_L2);
+
sctx->do_update_shaders = false;
return true;
}
+static void si_emit_scratch_state(struct si_context *sctx,
+ struct r600_atom *atom)
+{
+ struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
+
+ radeon_set_context_reg(cs, R_0286E8_SPI_TMPRING_SIZE,
+ sctx->spi_tmpring_size);
+
+ if (sctx->scratch_buffer) {
+ radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
+ sctx->scratch_buffer, RADEON_USAGE_READWRITE,
+ RADEON_PRIO_SCRATCH_BUFFER);
+ }
+}
+
void si_init_shader_functions(struct si_context *sctx)
{
si_init_atom(sctx, &sctx->spi_map, &sctx->atoms.s.spi_map, si_emit_spi_map);
+ si_init_atom(sctx, &sctx->scratch_state, &sctx->atoms.s.scratch_state,
+ si_emit_scratch_state);
sctx->b.b.create_vs_state = si_create_shader_selector;
sctx->b.b.create_tcs_state = si_create_shader_selector;
projects / mesa.git / blobdiff