radeonsi: switch r600_atom::emit parameter to si_context

[mesa.git] / src / gallium / drivers / radeonsi / si_state_streamout.c

diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index f4fcf70e342566a31b0b44508b08b6d107a41929..2b5b6ec588ae747c930a34c62a0144fca2a6c3a5 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -19,9 +19,6 @@
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  * SOFTWARE.
- *
- * Authors: Marek Olšák <maraeo@gmail.com>
- *
  */
 
 #include "si_pipe.h"
@@ -155,7 +152,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
                if (!targets[i])
                        continue;
 
-               r600_context_add_resource_size(ctx, targets[i]->buffer);
+               si_context_add_resource_size(ctx, targets[i]->buffer);
                enabled_mask |= 1 << i;
 
                if (offsets[i] == ((unsigned)-1))
@@ -204,7 +201,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
                        /* Set the resource. */
                        pipe_resource_reference(&buffers->buffers[bufidx],
                                                buffer);
-                       radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
+                       radeon_add_to_gfx_buffer_list_check_mem(sctx,
                                                            (struct r600_resource*)buffer,
                                                            buffers->shader_usage,
                                                            RADEON_PRIO_SHADER_RW_BUFFER,
@@ -234,7 +231,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
 
 static void si_flush_vgt_streamout(struct si_context *sctx)
 {
-       struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
+       struct radeon_winsys_cs *cs = sctx->b.gfx_cs;
        unsigned reg_strmout_cntl;
 
        /* The register is at different places on different ASICs. */
@@ -253,15 +250,14 @@ static void si_flush_vgt_streamout(struct si_context *sctx)
        radeon_emit(cs, WAIT_REG_MEM_EQUAL); /* wait until the register is equal to the reference value */
        radeon_emit(cs, reg_strmout_cntl >> 2);  /* register */
        radeon_emit(cs, 0);
-       radeon_emit(cs, S_008490_OFFSET_UPDATE_DONE(1)); /* reference value */
-       radeon_emit(cs, S_008490_OFFSET_UPDATE_DONE(1)); /* mask */
+       radeon_emit(cs, S_0084FC_OFFSET_UPDATE_DONE(1)); /* reference value */
+       radeon_emit(cs, S_0084FC_OFFSET_UPDATE_DONE(1)); /* mask */
        radeon_emit(cs, 4); /* poll interval */
 }
 
-static void si_emit_streamout_begin(struct r600_common_context *rctx, struct r600_atom *atom)
+static void si_emit_streamout_begin(struct si_context *sctx, struct r600_atom *atom)
 {
-       struct si_context *sctx = (struct si_context*)rctx;
-       struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
+       struct radeon_winsys_cs *cs = sctx->b.gfx_cs;
        struct si_streamout_target **t = sctx->streamout.targets;
        uint16_t *stride_in_dw = sctx->streamout.stride_in_dw;
        unsigned i;
@@ -295,7 +291,7 @@ static void si_emit_streamout_begin(struct r600_common_context *rctx, struct r60
                        radeon_emit(cs, va); /* src address lo */
                        radeon_emit(cs, va >> 32); /* src address hi */
 
-                       radeon_add_to_buffer_list(&sctx->b,  &sctx->b.gfx,
+                       radeon_add_to_buffer_list(&sctx->b,  sctx->b.gfx_cs,
                                                  t[i]->buf_filled_size,
                                                  RADEON_USAGE_READ,
                                                  RADEON_PRIO_SO_FILLED_SIZE);
@@ -316,7 +312,7 @@ static void si_emit_streamout_begin(struct r600_common_context *rctx, struct r60
 
 void si_emit_streamout_end(struct si_context *sctx)
 {
-       struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
+       struct radeon_winsys_cs *cs = sctx->b.gfx_cs;
        struct si_streamout_target **t = sctx->streamout.targets;
        unsigned i;
        uint64_t va;
@@ -337,7 +333,7 @@ void si_emit_streamout_end(struct si_context *sctx)
                radeon_emit(cs, 0); /* unused */
                radeon_emit(cs, 0); /* unused */
 
-               radeon_add_to_buffer_list(&sctx->b,  &sctx->b.gfx,
+               radeon_add_to_buffer_list(&sctx->b,  sctx->b.gfx_cs,
                                          t[i]->buf_filled_size,
                                          RADEON_USAGE_WRITE,
                                          RADEON_PRIO_SO_FILLED_SIZE);
@@ -352,7 +348,6 @@ void si_emit_streamout_end(struct si_context *sctx)
        }
 
        sctx->streamout.begin_emitted = false;
-       sctx->b.flags |= R600_CONTEXT_STREAMOUT_FLUSH;
 }
 
 /* STREAMOUT CONFIG DERIVED STATE
@@ -362,19 +357,17 @@ void si_emit_streamout_end(struct si_context *sctx)
  * are no buffers bound.
  */
 
-static void si_emit_streamout_enable(struct r600_common_context *rctx,
+static void si_emit_streamout_enable(struct si_context *sctx,
                                     struct r600_atom *atom)
 {
-       struct si_context *sctx = (struct si_context*)rctx;
-
-       radeon_set_context_reg_seq(sctx->b.gfx.cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
-       radeon_emit(sctx->b.gfx.cs,
+       radeon_set_context_reg_seq(sctx->b.gfx_cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
+       radeon_emit(sctx->b.gfx_cs,
                    S_028B94_STREAMOUT_0_EN(si_get_strmout_en(sctx)) |
                    S_028B94_RAST_STREAM(0) |
                    S_028B94_STREAMOUT_1_EN(si_get_strmout_en(sctx)) |
                    S_028B94_STREAMOUT_2_EN(si_get_strmout_en(sctx)) |
                    S_028B94_STREAMOUT_3_EN(si_get_strmout_en(sctx)));
-       radeon_emit(sctx->b.gfx.cs,
+       radeon_emit(sctx->b.gfx_cs,
                    sctx->streamout.hw_enabled_mask &
                    sctx->streamout.enabled_stream_buffers_mask);
 }