*/
if (sscreen->info.chip_class == GFX8)
bpe = 4;
-
- flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;
}
if (is_stencil)
const struct radeon_surf *surface,
const struct si_texture *plane0,
struct pb_buffer *imported_buf, uint64_t offset,
- uint64_t alloc_size, unsigned alignment)
+ uint64_t alloc_size, unsigned alignment,
+ bool tc_compatible_htile)
{
struct si_texture *tex;
struct si_resource *resource;
/* don't include stencil-only formats which we don't support for rendering */
tex->is_depth = util_format_has_depth(util_format_description(tex->buffer.b.b.format));
tex->surface = *surface;
- tex->tc_compatible_htile =
- tex->surface.htile_size != 0 && (tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE);
+ tex->tc_compatible_htile = tex->surface.tc_compatible_htile_allowed &&
+ tc_compatible_htile;
/* TC-compatible HTILE:
* - GFX8 only supports Z32_FLOAT.
for (unsigned i = 0; i < num_planes; i++) {
struct si_texture *tex =
si_texture_create_object(screen, &plane_templ[i], &surface[i], plane0, NULL,
- plane_offset[i], total_size, max_alignment);
+ plane_offset[i], total_size, max_alignment,
+ tc_compatible_htile);
if (!tex) {
si_texture_reference(&plane0, NULL);
return NULL;
if (r)
return NULL;
- tex = si_texture_create_object(&sscreen->b, templ, &surface, NULL, buf, offset, 0, 0);
+ tex = si_texture_create_object(&sscreen->b, templ, &surface, NULL, buf, offset, 0, 0, false);
if (!tex)
return NULL;