radeonsi:create uvd hevc enc entry

[mesa.git] / src / gallium / drivers / radeonsi / si_uvd.c

diff --git a/src/gallium/drivers/radeonsi/si_uvd.c b/src/gallium/drivers/radeonsi/si_uvd.c
index 21582d130b4d24825fbacd636cca42109fdea6c0..3906bbdfb827cd78a908df8a25105d8b07b2abe5 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -25,17 +25,14 @@
  *
  **************************************************************************/
 
-/*
- * Authors:
- *      Christian König <christian.koenig@amd.com>
- *
- */
-
 #include "si_pipe.h"
 #include "radeon/radeon_video.h"
 #include "radeon/radeon_uvd.h"
 #include "radeon/radeon_vce.h"
 #include "radeon/radeon_vcn_dec.h"
+#include "radeon/radeon_vcn_enc.h"
+#include "radeon/radeon_uvd_enc.h"
+#include "util/u_video.h"
 
 /**
  * creates an video buffer with an UVD compatible memory layout
@@ -48,7 +45,7 @@ struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
        struct radeon_surf *surfaces[VL_NUM_COMPONENTS] = {};
        struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
        const enum pipe_format *resource_formats;
-       struct pipe_video_buffer template;
+       struct pipe_video_buffer vidtemplate;
        struct pipe_resource templ;
        unsigned i, array_size;
 
@@ -60,15 +57,15 @@ struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
                return NULL;
 
        array_size = tmpl->interlaced ? 2 : 1;
-       template = *tmpl;
-       template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
-       template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
+       vidtemplate = *tmpl;
+       vidtemplate.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
+       vidtemplate.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
 
        assert(resource_formats[0] != PIPE_FORMAT_NONE);
 
        for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
                if (resource_formats[i] != PIPE_FORMAT_NONE) {
-                       vl_video_buffer_template(&templ, &template,
+                       vl_video_buffer_template(&templ, &vidtemplate,
                                                 resource_formats[i], 1,
                                                 array_size, PIPE_USAGE_DEFAULT, i);
                        /* Set PIPE_BIND_SHARED to avoid reallocation in r600_texture_get_handle,
@@ -101,8 +98,8 @@ struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
                        resources[i]->resource.buf);
        }
 
-       template.height *= array_size;
-       return vl_video_buffer_create_ex2(pipe, &template, (struct pipe_resource **)resources);
+       vidtemplate.height *= array_size;
+       return vl_video_buffer_create_ex2(pipe, &vidtemplate, (struct pipe_resource **)resources);
 
 error:
        for (i = 0; i < VL_NUM_COMPONENTS; ++i)
@@ -117,7 +114,7 @@ static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_bu
        struct si_screen *sscreen = (struct si_screen*)buf->base.context->screen;
        struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
        struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
-       enum ruvd_surface_type type =  (sscreen->b.chip_class >= GFX9) ?
+       enum ruvd_surface_type type =  (sscreen->info.chip_class >= GFX9) ?
                                        RUVD_SURFACE_TYPE_GFX9 :
                                        RUVD_SURFACE_TYPE_LEGACY;
 
@@ -151,8 +148,16 @@ struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
        struct si_context *ctx = (struct si_context *)context;
        bool vcn = (ctx->b.family == CHIP_RAVEN) ? true : false;
 
-       if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
-               return si_vce_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
+       if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
+               if (vcn) {
+                       radeon_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
+               } else {
+                       if (u_reduce_video_profile(templ->profile) == PIPE_VIDEO_FORMAT_HEVC)
+                               return radeon_uvd_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
+                       else
+                               return si_vce_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
+               }
+       }
 
        return (vcn) ?  radeon_create_decoder(context, templ) :
                si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);