#define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7
#define PKT3_NOP 0x10
+#define PKT3_SET_BASE 0x11
+#define PKT3_CLEAR_STATE 0x12
+#define PKT3_INDEX_BUFFER_SIZE 0x13
#define PKT3_DISPATCH_DIRECT 0x15
#define PKT3_DISPATCH_INDIRECT 0x16
#define PKT3_OCCLUSION_QUERY 0x1F /* new for CIK */
#define PKT3_SET_PREDICATION 0x20
#define PKT3_COND_EXEC 0x22
#define PKT3_PRED_EXEC 0x23
+#define PKT3_DRAW_INDIRECT 0x24
+#define PKT3_DRAW_INDEX_INDIRECT 0x25
+#define PKT3_INDEX_BASE 0x26
#define PKT3_DRAW_INDEX_2 0x27
#define PKT3_CONTEXT_CONTROL 0x28
#define PKT3_INDEX_TYPE 0x2A
+#define PKT3_DRAW_INDIRECT_MULTI 0x2C
#define PKT3_DRAW_INDEX_AUTO 0x2D
#define PKT3_DRAW_INDEX_IMMD 0x2E /* not on CIK */
#define PKT3_NUM_INSTANCES 0x2F
+#define PKT3_DRAW_INDEX_MULTI_AUTO 0x30
+#define PKT3_INDIRECT_BUFFER 0x32
#define PKT3_STRMOUT_BUFFER_UPDATE 0x34
+#define PKT3_DRAW_INDEX_OFFSET_2 0x35
+#define PKT3_DRAW_PREAMBLE 0x36 /* new on CIK, required on GFX7.2 and later */
#define PKT3_WRITE_DATA 0x37
#define PKT3_WRITE_DATA_DST_SEL(x) ((x) << 8)
#define PKT3_WRITE_DATA_DST_SEL_REG 0
#define PKT3_WRITE_DATA_ENGINE_SEL_ME 0
#define PKT3_WRITE_DATA_ENGINE_SEL_PFP 1
#define PKT3_WRITE_DATA_ENGINE_SEL_CE 2
+#define PKT3_DRAW_INDEX_INDIRECT_MULTI 0x38
#define PKT3_MEM_SEMAPHORE 0x39
#define PKT3_MPEG_INDEX 0x3A /* not on CIK */
#define PKT3_WAIT_REG_MEM 0x3C
#define WAIT_REG_MEM_EQUAL 3
#define PKT3_MEM_WRITE 0x3D /* not on CIK */
-#define PKT3_INDIRECT_BUFFER 0x32
+#define PKT3_COPY_DATA 0x40
+#define COPY_DATA_SRC_SEL(x) ((x) & 0xf)
+#define COPY_DATA_REG 0
+#define COPY_DATA_MEM 1
+#define COPY_DATA_DST_SEL(x) (((x) & 0xf) << 8)
+#define COPY_DATA_WR_CONFIRM (1 << 20)
#define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */
#define PKT3_ME_INITIALIZE 0x44 /* not on CIK */
#define PKT3_COND_WRITE 0x45
#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1)
#define PKT3_SHADER_TYPE_S(x) (((x) & 0x1) << 1)
#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count))
-#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT3_IT_OPCODE_S(op) | PKT_COUNT_S(count) | PKT3_PREDICATE(predicate))
+#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate))
#define PKT3_CP_DMA 0x41
/* 1. header
* 6. COMMAND [29:22] | BYTE_COUNT [20:0]
*/
-
+#define GRBM_GFX_INDEX 0x802C
+#define INSTANCE_INDEX(x) ((x) << 0)
+#define SH_INDEX(x) ((x) << 8)
+#define SE_INDEX(x) ((x) << 16)
+#define SH_BROADCAST_WRITES (1 << 29)
+#define INSTANCE_BROADCAST_WRITES (1 << 30)
+#define SE_BROADCAST_WRITES (1 << 31)
#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC
#define S_0084FC_OFFSET_UPDATE_DONE(x) (((x) & 0x1) << 0)
#define R_0085F0_CP_COHER_CNTL 0x0085F0
#define S_00B32C_EXCP_EN(x) (((x) & 0x7F) << 8) /* mask is 0x1FF on CIK */
#define G_00B32C_EXCP_EN(x) (((x) >> 8) & 0x7F) /* mask is 0x1FF on CIK */
#define C_00B32C_EXCP_EN 0xFFFF80FF /* mask is 0x1FF on CIK */
+#define S_00B32C_LDS_SIZE(x) (((x) & 0x1FF) << 20) /* CIK, for on-chip GS */
+#define G_00B32C_LDS_SIZE(x) (((x) >> 20) & 0x1FF) /* CIK, for on-chip GS */
+#define C_00B32C_LDS_SIZE 0xE00FFFFF /* CIK, for on-chip GS */
#define R_00B330_SPI_SHADER_USER_DATA_ES_0 0x00B330
/* CIK */
#define R_00B41C_SPI_SHADER_PGM_RSRC3_HS 0x00B41C
#define V_02803C_X_ADDR_SURF_P8_32X32_16X16 0x0C
#define V_02803C_X_ADDR_SURF_P8_32X32_16X32 0x0D
#define V_02803C_X_ADDR_SURF_P8_32X64_32X32 0x0E
+#define V_02803C_X_ADDR_SURF_P16_32X32_8X16 0x10
+#define V_02803C_X_ADDR_SURF_P16_32X32_16X16 0x11
#define S_02803C_BANK_WIDTH(x) (((x) & 0x03) << 13)
#define G_02803C_BANK_WIDTH(x) (((x) >> 13) & 0x03)
#define C_02803C_BANK_WIDTH 0xFFFF9FFF
#define V_028350_RASTER_CONFIG_PKR_YSEL_1 0x01
#define V_028350_RASTER_CONFIG_PKR_YSEL_2 0x02
#define V_028350_RASTER_CONFIG_PKR_YSEL_3 0x03
+#define S_028350_PKR_XSEL2(x) (((x) & 0x03) << 14)
+#define G_028350_PKR_XSEL2(x) (((x) >> 14) & 0x03)
+#define C_028350_PKR_XSEL2 0xFFFF3FFF
+#define V_028350_RASTER_CONFIG_PKR_XSEL2_0 0x00
+#define V_028350_RASTER_CONFIG_PKR_XSEL2_1 0x01
+#define V_028350_RASTER_CONFIG_PKR_XSEL2_2 0x02
+#define V_028350_RASTER_CONFIG_PKR_XSEL2_3 0x03
#define S_028350_SC_MAP(x) (((x) & 0x03) << 16)
#define G_028350_SC_MAP(x) (((x) >> 16) & 0x03)
#define C_028350_SC_MAP 0xFFFCFFFF
#define C_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS 0x7FFFFFFF
#define R_028804_DB_EQAA 0x028804
#define S_028804_MAX_ANCHOR_SAMPLES(x) (((x) & 0x7) << 0)
+#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x7)
+#define C_028804_MAX_ANCHOR_SAMPLES (~(((~0) & 0x7) << 0))
#define S_028804_PS_ITER_SAMPLES(x) (((x) & 0x7) << 4)
+#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x7)
+#define C_028804_PS_ITER_SAMPLES (~(((~0) & 0x7) << 4))
#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) & 0x7) << 8)
+#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x7)
+#define C_028804_MASK_EXPORT_NUM_SAMPLES (~(((~0) & 0x7) << 8))
#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) & 0x7) << 12)
+#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x7)
+#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES (~(((~0) & 0x7) << 12))
#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) & 0x1) << 16)
+#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1)
+#define C_028804_HIGH_QUALITY_INTERSECTIONS (~(((~0) & 0x1) << 16))
#define S_028804_INCOHERENT_EQAA_READS(x) (((x) & 0x1) << 17)
+#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1)
+#define C_028804_INCOHERENT_EQAA_READS (~(((~0) & 0x1) << 17))
#define S_028804_INTERPOLATE_COMP_Z(x) (((x) & 0x1) << 18)
+#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1)
+#define C_028804_INTERPOLATE_COMP_Z (~(((~0) >> 18) & 0x1))
#define S_028804_INTERPOLATE_SRC_Z(x) (((x) & 0x1) << 19)
+#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1)
+#define C_028804_INTERPOLATE_SRC_Z (~(((~0) & 0x1) << 19))
#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) & 0x1) << 20)
+#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1)
+#define C_028804_STATIC_ANCHOR_ASSOCIATIONS (~(((~0) & 0x1) << 20))
#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) & 0x1) << 21)
+#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1)
+#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE (~(((~0) & 0x1) << 21))
#define R_028808_CB_COLOR_CONTROL 0x028808
#define S_028808_DEGAMMA_ENABLE(x) (((x) & 0x1) << 3)
#define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1)
#define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) & 0x03) << 13)
#define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 13) & 0x03)
#define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFF9FFF
+#define V_02880C_EXPORT_ANY_Z 0
+#define V_02880C_EXPORT_LESS_THAN_Z 1
+#define V_02880C_EXPORT_GREATER_THAN_Z 2
+#define V_02880C_EXPORT_RESERVED 3
/* */
#define R_028810_PA_CL_CLIP_CNTL 0x028810
#define S_028810_UCP_ENA_0(x) (((x) & 0x1) << 0)
#define S_028A6C_OUTPRIM_TYPE(x) (((x) & 0x3F) << 0)
#define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F)
#define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0
+#define V_028A6C_OUTPRIM_TYPE_POINTLIST 0
+#define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1
+#define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2
#define S_028A6C_OUTPRIM_TYPE_1(x) (((x) & 0x3F) << 8)
#define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F)
#define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF
#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) & 0x1) << 12)
#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1)
#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF
-#define R_028BE0_PA_SC_AA_CONFIG 0x028BE0
-#define S_028BE0_MSAA_NUM_SAMPLES(x) (((x) & 0x07) << 0)
-#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07)
-#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8
-#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4)
-#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1)
-#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF
-#define S_028BE0_MAX_SAMPLE_DIST(x) (((x) & 0x0F) << 13)
-#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F)
-#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF
-#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) & 0x07) << 20)
-#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07)
-#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF
-#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) & 0x03) << 24)
-#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03)
-#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF
#define R_028BE4_PA_SU_VTX_CNTL 0x028BE4
#define S_028BE4_PIX_CENTER(x) (((x) & 0x1) << 0)
#define G_028BE4_PIX_CENTER(x) (((x) >> 0) & 0x1)
#define S_028C74_FMASK_TILE_MODE_INDEX(x) (((x) & 0x1F) << 5)
#define G_028C74_FMASK_TILE_MODE_INDEX(x) (((x) >> 5) & 0x1F)
#define C_028C74_FMASK_TILE_MODE_INDEX 0xFFFFFC1F
+#define S_028C74_FMASK_BANK_HEIGHT(x) (((x) & 0x3) << 10) /* SI errata */
#define S_028C74_NUM_SAMPLES(x) (((x) & 0x07) << 12)
#define G_028C74_NUM_SAMPLES(x) (((x) >> 12) & 0x07)
#define C_028C74_NUM_SAMPLES 0xFFFF8FFF
#define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30
#define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34
+/* SI async DMA packets */
+#define SI_DMA_PACKET(cmd, sub_cmd, n) ((((cmd) & 0xF) << 28) | \
+ (((sub_cmd) & 0xFF) << 20) |\
+ (((n) & 0xFFFFF) << 0))
+/* SI async DMA Packet types */
+#define SI_DMA_PACKET_WRITE 0x2
+#define SI_DMA_PACKET_COPY 0x3
+#define SI_DMA_COPY_MAX_SIZE 0xfffe0
+#define SI_DMA_COPY_MAX_SIZE_DW 0xffff8
+#define SI_DMA_COPY_DWORD_ALIGNED 0x00
+#define SI_DMA_COPY_BYTE_ALIGNED 0x40
+#define SI_DMA_COPY_TILED 0x8
+#define SI_DMA_PACKET_INDIRECT_BUFFER 0x4
+#define SI_DMA_PACKET_SEMAPHORE 0x5
+#define SI_DMA_PACKET_FENCE 0x6
+#define SI_DMA_PACKET_TRAP 0x7
+#define SI_DMA_PACKET_SRBM_WRITE 0x9
+#define SI_DMA_PACKET_CONSTANT_FILL 0xd
+#define SI_DMA_PACKET_NOP 0xf
+
#endif /* _SID_H */
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