sbuf->key.flags = SVGA3D_SURFACE_TRANSFER_FROM_BUFFER;
}
+ if (sbuf->b.b.flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) {
+ /* This surface can be mapped persistently. We use
+ * coherent memory to avoid implementing memory barriers for
+ * persistent non-coherent memory for now.
+ */
+ sbuf->key.coherent = 1;
+ }
+
sbuf->key.size.width = sbuf->b.b.width0;
sbuf->key.size.height = 1;
sbuf->key.size.depth = 1;
/* add the surface to the surface list */
LIST_ADD(&bufsurf->list, &sbuf->surfaces);
+ /* Set the new bind flags for this buffer resource */
+ sbuf->bind_flags = bind_flags;
+
return PIPE_OK;
}
struct pipe_resource *dummy;
unsigned i;
+ if (swc->force_coherent || sbuf->key.coherent)
+ return PIPE_OK;
+
assert(svga_have_gb_objects(svga));
assert(numBoxes);
assert(sbuf->dma.updates == NULL);
unsigned i;
struct pipe_resource *dummy;
- if (!sbuf->dma.pending) {
+ if (!sbuf->dma.pending || svga->swc->force_coherent ||
+ sbuf->key.coherent) {
//debug_printf("no dma pending on buffer\n");
return;
}
*/
if (svga_have_gb_objects(svga)) {
struct svga_3d_update_gb_image *update = sbuf->dma.updates;
+
assert(update);
for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
memcpy((uint8_t *) map + start, (uint8_t *) sbuf->swbuf + start, len);
}
+ if (svga->swc->force_coherent || sbuf->key.coherent)
+ sbuf->map.num_ranges = 0;
+
svga_buffer_hw_storage_unmap(svga, sbuf);
/* This user/malloc buffer is now indistinguishable from a gpu buffer */
}
assert(sbuf->handle);
+ if (svga->swc->force_coherent || sbuf->key.coherent)
+ return sbuf->handle;
if (sbuf->map.num_ranges) {
if (!sbuf->dma.pending) {