*
**********************************************************/
+#include "git_sha1.h" /* For MESA_GIT_SHA1 */
#include "util/u_format.h"
#include "util/u_memory.h"
#include "util/u_inlines.h"
#include "util/u_string.h"
#include "util/u_math.h"
+#include "os/os_process.h"
+
#include "svga_winsys.h"
#include "svga_public.h"
#include "svga_context.h"
#include "svga_format.h"
+#include "svga_msg.h"
#include "svga_screen.h"
#include "svga_tgsi.h"
#include "svga_resource_texture.h"
/* NOTE: this constant may get moved into a svga3d*.h header file */
#define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
+#ifndef MESA_GIT_SHA1
+#define MESA_GIT_SHA1 "(unknown git revision)"
+#endif
+
#ifdef DEBUG
int SVGA_DEBUG = 0;
{ "cache", DEBUG_CACHE, NULL },
{ "streamout", DEBUG_STREAMOUT, NULL },
{ "query", DEBUG_QUERY, NULL },
+ { "samplers", DEBUG_SAMPLERS, NULL },
DEBUG_NAMED_VALUE_END
};
#endif
*/
build = "build: DEBUG;";
mutex = "mutex: " PIPE_ATOMIC ";";
+#elif defined(VMX86_STATS)
+ build = "build: OPT;";
#else
build = "build: RELEASE;";
#endif
switch (param) {
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
+ case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
return 1;
case PIPE_CAP_TWO_SIDED_STENCIL:
return 1;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
return 0;
case PIPE_CAP_USER_VERTEX_BUFFERS:
- case PIPE_CAP_USER_INDEX_BUFFERS:
return 0;
case PIPE_CAP_USER_CONSTANT_BUFFERS:
return 1;
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
+ case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
return 0;
case PIPE_CAP_TEXTURE_MULTISAMPLE:
return svgascreen->ms_samples ? 1 : 0;
return 1; /* may be a sw fallback, depending on restart index */
case PIPE_CAP_GENERATE_MIPMAP:
- return sws->have_vgpu10;
+ return sws->have_generate_mipmap_cmd;
/* Unsupported features */
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_STRING_MARKER:
case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
case PIPE_CAP_QUERY_MEMORY_INFO:
+ case PIPE_CAP_PCI_GROUP:
+ case PIPE_CAP_PCI_BUS:
+ case PIPE_CAP_PCI_DEVICE:
+ case PIPE_CAP_PCI_FUNCTION:
+ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
+ case PIPE_CAP_NATIVE_FENCE_FD:
return 0;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return 64;
case PIPE_CAP_VIDEO_MEMORY:
/* XXX: Query the host ? */
return 1;
+ case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
+ return sws->have_vgpu10;
+ case PIPE_CAP_CLEAR_TEXTURE:
+ return sws->have_vgpu10;
case PIPE_CAP_UMA:
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
case PIPE_CAP_TGSI_TXQS:
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
case PIPE_CAP_SHAREABLE_SHADERS:
- case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
- case PIPE_CAP_CLEAR_TEXTURE:
case PIPE_CAP_DRAW_PARAMETERS:
case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
case PIPE_CAP_QUERY_BUFFER_OBJECT:
+ case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
+ case PIPE_CAP_CULL_DISTANCE:
+ case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
+ case PIPE_CAP_TGSI_VOTE:
+ case PIPE_CAP_MAX_WINDOW_RECTANGLES:
+ case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
+ case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+ case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
+ case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
+ case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
+ case PIPE_CAP_TGSI_FS_FBFETCH:
+ case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+ case PIPE_CAP_DOUBLES:
+ case PIPE_CAP_INT64:
+ case PIPE_CAP_INT64_DIVMOD:
+ case PIPE_CAP_TGSI_TEX_TXF_LZ:
+ case PIPE_CAP_TGSI_CLOCK:
+ case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
+ case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
+ case PIPE_CAP_TGSI_BALLOT:
+ case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
+ case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
+ case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
return 0;
}
static int
-vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
+vgpu9_get_shader_param(struct pipe_screen *screen,
+ enum pipe_shader_type shader,
enum pipe_shader_cap param)
{
struct svga_screen *svgascreen = svga_screen(screen);
{
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
+ return get_uint_cap(sws,
+ SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS,
+ 512);
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
return 512;
* does it is better to defer loop unrolling to the state tracker.
*/
return 0;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 1;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
- case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
+ case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+ case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
+ case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
return 0;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
case PIPE_SHADER_CAP_MAX_TEMPS:
val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
return MIN2(val, SVGA3D_TEMPREG_MAX);
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 1;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
- case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
+ case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+ case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
+ case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
return 0;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
static int
-vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
+vgpu10_get_shader_param(struct pipe_screen *screen,
+ enum pipe_shader_type shader,
enum pipe_shader_cap param)
{
struct svga_screen *svgascreen = svga_screen(screen);
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return TRUE; /* XXX verify */
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_SUBROUTINES:
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
- case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
+ case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+ case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
+ case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
return 0;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
static int
-svga_get_shader_param(struct pipe_screen *screen, unsigned shader,
+svga_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
enum pipe_shader_cap param)
{
struct svga_screen *svgascreen = svga_screen(screen);
static boolean
svga_fence_finish(struct pipe_screen *screen,
+ struct pipe_context *ctx,
struct pipe_fence_handle *fence,
uint64_t timeout)
{
struct svga_winsys_screen *sws = svga_screen(screen)->sws;
+ boolean retVal;
- if (!timeout)
- return sws->fence_signalled(sws, fence, 0) == 0;
+ SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH);
- SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
- __FUNCTION__, fence);
+ if (!timeout) {
+ retVal = sws->fence_signalled(sws, fence, 0) == 0;
+ }
+ else {
+ SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
+ __FUNCTION__, fence);
- return sws->fence_finish(sws, fence, 0) == 0;
+ retVal = sws->fence_finish(sws, fence, 0) == 0;
+ }
+
+ SVGA_STATS_TIME_POP(sws);
+
+ return retVal;
}
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("map-buffer-time", SVGA_QUERY_MAP_BUFFER_TIME,
PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
- QUERY("num-resources-mapped", SVGA_QUERY_NUM_RESOURCES_MAPPED,
+ QUERY("num-buffers-mapped", SVGA_QUERY_NUM_BUFFERS_MAPPED,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-textures-mapped", SVGA_QUERY_NUM_TEXTURES_MAPPED,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-bytes-uploaded", SVGA_QUERY_NUM_BYTES_UPLOADED,
PIPE_DRIVER_QUERY_TYPE_BYTES),
+ QUERY("command-buffer-size", SVGA_QUERY_COMMAND_BUFFER_SIZE,
+ PIPE_DRIVER_QUERY_TYPE_BYTES),
+ QUERY("flush-time", SVGA_QUERY_FLUSH_TIME,
+ PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
+ QUERY("surface-write-flushes", SVGA_QUERY_SURFACE_WRITE_FLUSHES,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-readbacks", SVGA_QUERY_NUM_READBACKS,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-resource-updates", SVGA_QUERY_NUM_RESOURCE_UPDATES,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-buffer-uploads", SVGA_QUERY_NUM_BUFFER_UPLOADS,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-const-buf-updates", SVGA_QUERY_NUM_CONST_BUF_UPDATES,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-const-updates", SVGA_QUERY_NUM_CONST_UPDATES,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
/* running total counters */
QUERY("memory-used", SVGA_QUERY_MEMORY_USED,
#undef QUERY
if (!info)
- return Elements(queries);
+ return ARRAY_SIZE(queries);
- if (index >= Elements(queries))
+ if (index >= ARRAY_SIZE(queries))
return 0;
*info = queries[index];
}
+static void
+init_logging(struct pipe_screen *screen)
+{
+ static const char *log_prefix = "Mesa: ";
+ char host_log[1000];
+
+ /* Log Version to Host */
+ util_snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
+ "%s%s", log_prefix, svga_get_name(screen));
+ svga_host_log(host_log);
+
+ util_snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
+ "%s%s (%s)", log_prefix, PACKAGE_VERSION, MESA_GIT_SHA1);
+ svga_host_log(host_log);
+
+ /* If the SVGA_EXTRA_LOGGING env var is set, log the process's command
+ * line (program name and arguments).
+ */
+ if (debug_get_bool_option("SVGA_EXTRA_LOGGING", FALSE)) {
+ char cmdline[1000];
+ if (os_get_command_line(cmdline, sizeof(cmdline))) {
+ util_snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
+ "%s%s", log_prefix, cmdline);
+ svga_host_log(host_log);
+ }
+ }
+}
+
+
static void
svga_destroy_screen( struct pipe_screen *screen )
{
svga_screen_cache_cleanup(svgascreen);
- pipe_mutex_destroy(svgascreen->swc_mutex);
- pipe_mutex_destroy(svgascreen->tex_mutex);
+ mtx_destroy(&svgascreen->swc_mutex);
+ mtx_destroy(&svgascreen->tex_mutex);
svgascreen->sws->destroy(svgascreen->sws);
debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
svgascreen->debug.no_sampler_view =
debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
+ svgascreen->debug.no_cache_index_buffers =
+ debug_get_bool_option("SVGA_NO_CACHE_INDEX_BUFFERS", FALSE);
screen = &svgascreen->screen;
svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
}
+ if (svgascreen->hw_version < SVGA3D_HWVERSION_WS8_B1) {
+ /* too old for 3D acceleration */
+ debug_printf("Hardware version 0x%x is too old for accerated 3D\n",
+ svgascreen->hw_version);
+ goto error2;
+ }
+
/*
* The D16, D24X8, and D24S8 formats always do an implicit shadow compare
* when sampled from, where as the DF16, DF24, and D24S8_INT do not. So
svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
/* Multisample samples per pixel */
- svgascreen->ms_samples =
- get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
+ if (debug_get_bool_option("SVGA_MSAA", TRUE)) {
+ svgascreen->ms_samples =
+ get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
+ }
/* Maximum number of constant buffers */
svgascreen->max_const_buffers =
svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
svgascreen->maxLineWidth);
debug_printf("svga: maxPointSize %g\n", svgascreen->maxPointSize);
+ debug_printf("svga: msaa samples mask: 0x%x\n", svgascreen->ms_samples);
}
- pipe_mutex_init(svgascreen->tex_mutex);
- pipe_mutex_init(svgascreen->swc_mutex);
+ (void) mtx_init(&svgascreen->tex_mutex, mtx_plain);
+ (void) mtx_init(&svgascreen->swc_mutex, mtx_recursive);
svga_screen_cache_init(svgascreen);
+ init_logging(screen);
+
return screen;
error2:
FREE(svgascreen);