switch (param) {
case PIPE_CAPF_MAX_LINE_WIDTH:
- /* fall-through */
+ return svgascreen->maxLineWidth;
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
- return 7.0;
+ return svgascreen->maxLineWidthAA;
case PIPE_CAPF_MAX_POINT_WIDTH:
/* fall-through */
SVGA3dDevCapResult result;
switch (param) {
- case PIPE_CAP_MAX_COMBINED_SAMPLERS:
- return 16;
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
return 1;
case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
- case PIPE_CAP_SCALED_RESOLVE:
case PIPE_CAP_MIN_TEXEL_OFFSET:
case PIPE_CAP_MAX_TEXEL_OFFSET:
+ case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
+ case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_CONDITIONAL_RENDER:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
+ case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
+ case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+ case PIPE_CAP_MAX_VERTEX_STREAMS:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_START_INSTANCE:
case PIPE_CAP_QUERY_TIMESTAMP:
case PIPE_CAP_TEXTURE_MULTISAMPLE:
- case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
case PIPE_CAP_CUBE_MAP_ARRAY:
case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
+ case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
+ case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
+ case PIPE_CAP_TEXTURE_GATHER_SM5:
+ case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+ case PIPE_CAP_FAKE_SW_MSAA:
+ case PIPE_CAP_TEXTURE_QUERY_LOD:
+ case PIPE_CAP_SAMPLE_SHADING:
+ case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
+ case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
+ case PIPE_CAP_DRAW_INDIRECT:
+ case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
+ case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
+ case PIPE_CAP_SAMPLER_VIEW_TARGET:
+ case PIPE_CAP_CLIP_HALFZ:
+ case PIPE_CAP_VERTEXID_NOBASE:
+ case PIPE_CAP_POLYGON_OFFSET_CLAMP:
+ case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
return 0;
+ case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
+ return 64;
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
return 1;
+ case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
+ return 2048;
case PIPE_CAP_MAX_VIEWPORTS:
return 1;
case PIPE_CAP_ENDIANNESS:
return PIPE_ENDIAN_LITTLE;
+
+ case PIPE_CAP_VENDOR_ID:
+ return 0x15ad; /* VMware Inc. */
+ case PIPE_CAP_DEVICE_ID:
+ return 0x0405; /* assume SVGA II */
+ case PIPE_CAP_ACCELERATED:
+ return 0; /* XXX: */
+ case PIPE_CAP_VIDEO_MEMORY:
+ /* XXX: Query the host ? */
+ return 1;
+ case PIPE_CAP_UMA:
+ case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
+ case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
+ case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
+ return 0;
}
debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
return SVGA3D_MAX_NESTING_LEVEL;
case PIPE_SHADER_CAP_MAX_INPUTS:
return 10;
- case PIPE_SHADER_CAP_MAX_CONSTS:
- return 224;
+ case PIPE_SHADER_CAP_MAX_OUTPUTS:
+ return svgascreen->max_color_buffers;
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
+ return 224 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
return 32;
return MIN2(result.u, SVGA3D_TEMPREG_MAX);
- case PIPE_SHADER_CAP_MAX_ADDRS:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
/*
* Although PS 3.0 has some addressing abilities it can only represent
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
- default:
- debug_printf("Unexpected fragment shader query %u\n", param);
+ case PIPE_SHADER_CAP_PREFERRED_IR:
+ return PIPE_SHADER_IR_TGSI;
+ case PIPE_SHADER_CAP_DOUBLES:
+ case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 0;
}
- break;
+ /* If we get here, we failed to handle a cap above */
+ debug_printf("Unexpected fragment shader query %u\n", param);
+ return 0;
case PIPE_SHADER_VERTEX:
switch (param)
{
return SVGA3D_MAX_NESTING_LEVEL;
case PIPE_SHADER_CAP_MAX_INPUTS:
return 16;
- case PIPE_SHADER_CAP_MAX_CONSTS:
- return 256;
+ case PIPE_SHADER_CAP_MAX_OUTPUTS:
+ return 10;
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
+ return 256 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
return 32;
return MIN2(result.u, SVGA3D_TEMPREG_MAX);
- case PIPE_SHADER_CAP_MAX_ADDRS:
- return 1;
case PIPE_SHADER_CAP_MAX_PREDS:
return 1;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 0;
- default:
- debug_printf("Unexpected vertex shader query %u\n", param);
+ case PIPE_SHADER_CAP_PREFERRED_IR:
+ return PIPE_SHADER_IR_TGSI;
+ case PIPE_SHADER_CAP_DOUBLES:
+ case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 0;
}
- break;
+ /* If we get here, we failed to handle a cap above */
+ debug_printf("Unexpected vertex shader query %u\n", param);
+ return 0;
case PIPE_SHADER_GEOMETRY:
case PIPE_SHADER_COMPUTE:
- /* no support for geometry or compute shaders at this time */
+ case PIPE_SHADER_TESS_CTRL:
+ case PIPE_SHADER_TESS_EVAL:
+ /* no support for geometry, tess or compute shaders at this time */
return 0;
default:
debug_printf("Unexpected shader type (%u) query\n", shader);
}
+/**
+ * Implemnt pipe_screen::is_format_supported().
+ * \param bindings bitmask of PIPE_BIND_x flags
+ */
static boolean
svga_is_format_supported( struct pipe_screen *screen,
enum pipe_format format,
enum pipe_texture_target target,
unsigned sample_count,
- unsigned tex_usage)
+ unsigned bindings)
{
struct svga_screen *ss = svga_screen(screen);
SVGA3dSurfaceFormat svga_format;
SVGA3dSurfaceFormatCaps caps;
SVGA3dSurfaceFormatCaps mask;
- assert(tex_usage);
+ assert(bindings);
if (sample_count > 1) {
return FALSE;
}
- svga_format = svga_translate_format(ss, format, tex_usage);
+ svga_format = svga_translate_format(ss, format, bindings);
if (svga_format == SVGA3D_FORMAT_INVALID) {
return FALSE;
}
* visuals for all virtual hardware implementations.
*/
- if (tex_usage & PIPE_BIND_DISPLAY_TARGET) {
+ if (bindings & PIPE_BIND_DISPLAY_TARGET) {
switch (svga_format) {
case SVGA3D_A8R8G8B8:
case SVGA3D_X8R8G8B8:
svga_get_format_cap(ss, svga_format, &caps);
mask.value = 0;
- if (tex_usage & PIPE_BIND_RENDER_TARGET) {
+ if (bindings & PIPE_BIND_RENDER_TARGET) {
mask.offscreenRenderTarget = 1;
}
- if (tex_usage & PIPE_BIND_DEPTH_STENCIL) {
+ if (bindings & PIPE_BIND_DEPTH_STENCIL) {
mask.zStencil = 1;
}
- if (tex_usage & PIPE_BIND_SAMPLER_VIEW) {
+ if (bindings & PIPE_BIND_SAMPLER_VIEW) {
mask.texture = 1;
}
}
-static boolean
-svga_fence_signalled(struct pipe_screen *screen,
- struct pipe_fence_handle *fence)
-{
- struct svga_winsys_screen *sws = svga_screen(screen)->sws;
- return sws->fence_signalled(sws, fence, 0) == 0;
-}
-
-
static boolean
svga_fence_finish(struct pipe_screen *screen,
struct pipe_fence_handle *fence,
{
struct svga_winsys_screen *sws = svga_screen(screen)->sws;
+ if (!timeout)
+ return sws->fence_signalled(sws, fence, 0) == 0;
+
SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
__FUNCTION__, fence);
struct pipe_driver_query_info *info)
{
static const struct pipe_driver_query_info queries[] = {
- {"draw-calls", SVGA_QUERY_DRAW_CALLS, 0, FALSE},
- {"fallbacks", SVGA_QUERY_FALLBACKS, 0, FALSE},
- {"memory-used", SVGA_QUERY_MEMORY_USED, 0, TRUE}
+ {"draw-calls", SVGA_QUERY_DRAW_CALLS, {0}},
+ {"fallbacks", SVGA_QUERY_FALLBACKS, {0}},
+ {"memory-used", SVGA_QUERY_MEMORY_USED, {0}, PIPE_DRIVER_QUERY_TYPE_BYTES}
};
if (!info)
screen->destroy = svga_destroy_screen;
screen->get_name = svga_get_name;
screen->get_vendor = svga_get_vendor;
+ screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
screen->get_param = svga_get_param;
screen->get_shader_param = svga_get_shader_param;
screen->get_paramf = svga_get_paramf;
screen->is_format_supported = svga_is_format_supported;
screen->context_create = svga_context_create;
screen->fence_reference = svga_fence_reference;
- screen->fence_signalled = svga_fence_signalled;
screen->fence_finish = svga_fence_finish;
screen->get_driver_query_info = svga_get_driver_query_info;
svgascreen->sws = sws;
}
}
+ /* Query device caps
+ */
+ if (!sws->get_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, &result))
+ svgascreen->haveLineStipple = FALSE;
+ else
+ svgascreen->haveLineStipple = result.u;
+
+ if (!sws->get_cap(sws, SVGA3D_DEVCAP_LINE_AA, &result))
+ svgascreen->haveLineSmooth = FALSE;
+ else
+ svgascreen->haveLineSmooth = result.u;
+
+ if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, &result))
+ svgascreen->maxLineWidth = 1.0F;
+ else
+ svgascreen->maxLineWidth = result.f;
+
+ if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, &result))
+ svgascreen->maxLineWidthAA = 1.0F;
+ else
+ svgascreen->maxLineWidthAA = result.f;
+
+ if (0)
+ debug_printf("svga: haveLineStip %u "
+ "haveLineSmooth %u maxLineWidth %f\n",
+ svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
+ svgascreen->maxLineWidth);
+
if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, &result)) {
svgascreen->maxPointSize = 1.0F;
} else {