svga: add support for FS sample mask output
[mesa.git] / src / gallium / drivers / svga / svga_screen.c
index fd849db38c777be32ee4abfb96f094d707d2a927..b66b560fcc0bfca4935fb1d4f41bbf96430f1d63 100644 (file)
@@ -27,6 +27,7 @@
 #include "util/u_format.h"
 #include "util/u_memory.h"
 #include "util/u_inlines.h"
+#include "util/u_screen.h"
 #include "util/u_string.h"
 #include "util/u_math.h"
 
 /* NOTE: this constant may get moved into a svga3d*.h header file */
 #define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
 
-#ifndef MESA_GIT_SHA1
-#define MESA_GIT_SHA1 "(unknown git revision)"
-#endif
-
 #ifdef DEBUG
 int SVGA_DEBUG = 0;
 
@@ -111,7 +108,8 @@ svga_get_name( struct pipe_screen *pscreen )
 
 /** Helper for querying float-valued device cap */
 static float
-get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
+get_float_cap(struct svga_winsys_screen *sws, SVGA3dDevCapIndex cap,
+              float defaultVal)
 {
    SVGA3dDevCapResult result;
    if (sws->get_cap(sws, cap, &result))
@@ -123,7 +121,8 @@ get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
 
 /** Helper for querying uint-valued device cap */
 static unsigned
-get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
+get_uint_cap(struct svga_winsys_screen *sws, SVGA3dDevCapIndex cap,
+             unsigned defaultVal)
 {
    SVGA3dDevCapResult result;
    if (sws->get_cap(sws, cap, &result))
@@ -135,7 +134,8 @@ get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
 
 /** Helper for querying boolean-valued device cap */
 static boolean
-get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
+get_bool_cap(struct svga_winsys_screen *sws, SVGA3dDevCapIndex cap,
+             boolean defaultVal)
 {
    SVGA3dDevCapResult result;
    if (sws->get_cap(sws, cap, &result))
@@ -168,11 +168,13 @@ svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
       return 15.0;
 
-   case PIPE_CAPF_GUARD_BAND_LEFT:
-   case PIPE_CAPF_GUARD_BAND_TOP:
-   case PIPE_CAPF_GUARD_BAND_RIGHT:
-   case PIPE_CAPF_GUARD_BAND_BOTTOM:
-      return 0.0;
+   case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
+      /* fall-through */
+   case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
+      /* fall-through */
+   case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
+      return 0.0f;
+
    }
 
    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
@@ -192,8 +194,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
       return 1;
-   case PIPE_CAP_TWO_SIDED_STENCIL:
-      return 1;
    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
       /*
        * "In virtually every OpenGL implementation and hardware,
@@ -215,16 +215,12 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return 0;
    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
       return sws->have_vgpu10;
-   case PIPE_CAP_TEXTURE_SHADOW_MAP:
-      return 1;
    case PIPE_CAP_TEXTURE_SWIZZLE:
       return 1;
    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
       return 0;
    case PIPE_CAP_USER_VERTEX_BUFFERS:
       return 0;
-   case PIPE_CAP_USER_CONSTANT_BUFFERS:
-      return 1;
    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
       return 256;
 
@@ -283,7 +279,11 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_GLSL_FEATURE_LEVEL:
       return sws->have_vgpu10 ? 330 : 120;
 
+   case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
+      return sws->have_vgpu10 ? 140 : 120;
+
    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
+   case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
       return 0;
 
    case PIPE_CAP_SM3:
@@ -340,18 +340,25 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_NATIVE_FENCE_FD:
       return sws->have_fence_fd;
 
-   /* Unsupported features */
    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
+      return 1;
+
+   case PIPE_CAP_CUBE_MAP_ARRAY:
+   case PIPE_CAP_INDEP_BLEND_FUNC:
+   case PIPE_CAP_SAMPLE_SHADING:
+   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
+      return sws->have_sm4_1;
+
+   /* Unsupported features */
    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
+   case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
    case PIPE_CAP_SHADER_STENCIL_EXPORT:
    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
-   case PIPE_CAP_INDEP_BLEND_FUNC:
    case PIPE_CAP_TEXTURE_BARRIER:
    case PIPE_CAP_MAX_VERTEX_STREAMS:
    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
    case PIPE_CAP_COMPUTE:
    case PIPE_CAP_START_INSTANCE:
-   case PIPE_CAP_CUBE_MAP_ARRAY:
    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
@@ -359,7 +366,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_GATHER_SM5:
    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
    case PIPE_CAP_TEXTURE_QUERY_LOD:
-   case PIPE_CAP_SAMPLE_SHADING:
    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
    case PIPE_CAP_DRAW_INDIRECT:
@@ -383,6 +389,13 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_PCI_DEVICE:
    case PIPE_CAP_PCI_FUNCTION:
    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
+   case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
+   case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
+   case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
+   case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
+   case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
+   case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
+   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
       return 64;
@@ -418,7 +431,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
    case PIPE_CAP_DEPTH_BOUNDS_TEST:
    case PIPE_CAP_TGSI_TXQS:
-   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
    case PIPE_CAP_SHAREABLE_SHADERS:
    case PIPE_CAP_DRAW_PARAMETERS:
    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
@@ -451,11 +463,27 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_POST_DEPTH_COVERAGE:
    case PIPE_CAP_BINDLESS_TEXTURE:
    case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
+   case PIPE_CAP_QUERY_SO_OVERFLOW:
+   case PIPE_CAP_MEMOBJ:
+   case PIPE_CAP_LOAD_CONSTBUF:
+   case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
+   case PIPE_CAP_TILE_RASTER_ORDER:
+   case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
+   case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
+   case PIPE_CAP_CONTEXT_PRIORITY_MASK:
+   case PIPE_CAP_FENCE_SIGNAL:
+   case PIPE_CAP_CONSTBUF0_FLAGS:
+   case PIPE_CAP_PACKED_UNIFORMS:
+   case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
       return 0;
+   case PIPE_CAP_MAX_GS_INVOCATIONS:
+      return 32;
+   case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
+      return 1 << 27;
+   default:
+      return u_pipe_screen_get_param_defaults(screen, param);
    }
-
-   debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
-   return 0;
 }
 
 
@@ -497,12 +525,12 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
          return MIN2(val, SVGA3D_TEMPREG_MAX);
       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
-        /* 
-         * Although PS 3.0 has some addressing abilities it can only represent
-         * loops that can be statically determined and unrolled. Given we can
-         * only handle a subset of the cases that the state tracker already
-         * does it is better to defer loop unrolling to the state tracker.
-         */
+         /*
+          * Although PS 3.0 has some addressing abilities it can only represent
+          * loops that can be statically determined and unrolled. Given we can
+          * only handle a subset of the cases that the state tracker already
+          * does it is better to defer loop unrolling to the state tracker.
+          */
          return 0;
       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
          return 0;
@@ -514,8 +542,11 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
          return 0;
       case PIPE_SHADER_CAP_SUBROUTINES:
          return 0;
+      case PIPE_SHADER_CAP_INT64_ATOMICS:
       case PIPE_SHADER_CAP_INTEGERS:
          return 0;
+      case PIPE_SHADER_CAP_FP16:
+         return 0;
       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
          return 16;
@@ -525,13 +556,18 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
          return 0;
       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+      case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+      case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+      case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
          return 0;
+      case PIPE_SHADER_CAP_SCALAR_ISA:
+         return 1;
       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
          return 32;
       }
@@ -575,8 +611,11 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
          return 1;
       case PIPE_SHADER_CAP_SUBROUTINES:
          return 0;
+      case PIPE_SHADER_CAP_INT64_ATOMICS:
       case PIPE_SHADER_CAP_INTEGERS:
          return 0;
+      case PIPE_SHADER_CAP_FP16:
+         return 0;
       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
          return 0;
@@ -586,13 +625,18 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
          return 0;
       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+      case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+      case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+      case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
          return 0;
+      case PIPE_SHADER_CAP_SCALAR_ISA:
+         return 1;
       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
          return 32;
       }
@@ -672,22 +716,30 @@ vgpu10_get_shader_param(struct pipe_screen *screen,
    case PIPE_SHADER_CAP_SUBROUTINES:
    case PIPE_SHADER_CAP_INTEGERS:
       return TRUE;
+   case PIPE_SHADER_CAP_FP16:
+      return FALSE;
    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
       return SVGA3D_DX_MAX_SAMPLERS;
    case PIPE_SHADER_CAP_PREFERRED_IR:
       return PIPE_SHADER_IR_TGSI;
    case PIPE_SHADER_CAP_SUPPORTED_IRS:
-         return 0;
+      return 0;
    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+   case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
    case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
    case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
    case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+   case PIPE_SHADER_CAP_INT64_ATOMICS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+   case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
       return 0;
+   case PIPE_SHADER_CAP_SCALAR_ISA:
+      return 1;
    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
       return 32;
    default:
@@ -713,122 +765,6 @@ svga_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
 }
 
 
-/**
- * Implement pipe_screen::is_format_supported().
- * \param bindings  bitmask of PIPE_BIND_x flags
- */
-static boolean
-svga_is_format_supported( struct pipe_screen *screen,
-                          enum pipe_format format,
-                          enum pipe_texture_target target,
-                          unsigned sample_count,
-                          unsigned bindings)
-{
-   struct svga_screen *ss = svga_screen(screen);
-   SVGA3dSurfaceFormat svga_format;
-   SVGA3dSurfaceFormatCaps caps;
-   SVGA3dSurfaceFormatCaps mask;
-
-   assert(bindings);
-
-   if (sample_count > 1) {
-      /* In ms_samples, if bit N is set it means that we support
-       * multisample with N+1 samples per pixel.
-       */
-      if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
-         return FALSE;
-      }
-   }
-
-   svga_format = svga_translate_format(ss, format, bindings);
-   if (svga_format == SVGA3D_FORMAT_INVALID) {
-      return FALSE;
-   }
-
-   /* we don't support sRGB rendering into display targets */
-   if (util_format_is_srgb(format) && (bindings & PIPE_BIND_DISPLAY_TARGET)) {
-      return FALSE;
-   }
-
-   /*
-    * For VGPU10 vertex formats, skip querying host capabilities
-    */
-
-   if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
-      SVGA3dSurfaceFormat svga_format;
-      unsigned flags;
-      svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
-      return svga_format != SVGA3D_FORMAT_INVALID;
-   }
-
-   /*
-    * Override host capabilities, so that we end up with the same
-    * visuals for all virtual hardware implementations.
-    */
-
-   if (bindings & PIPE_BIND_DISPLAY_TARGET) {
-      switch (svga_format) {
-      case SVGA3D_A8R8G8B8:
-      case SVGA3D_X8R8G8B8:
-      case SVGA3D_R5G6B5:
-         break;
-
-      /* VGPU10 formats */
-      case SVGA3D_B8G8R8A8_UNORM:
-      case SVGA3D_B8G8R8X8_UNORM:
-      case SVGA3D_B5G6R5_UNORM:
-         break;
-
-      /* Often unsupported/problematic. This means we end up with the same
-       * visuals for all virtual hardware implementations.
-       */
-      case SVGA3D_A4R4G4B4:
-      case SVGA3D_A1R5G5B5:
-         return FALSE;
-         
-      default:
-         return FALSE;
-      }
-   }
-   
-   /*
-    * Query the host capabilities.
-    */
-
-   svga_get_format_cap(ss, svga_format, &caps);
-
-   if (bindings & PIPE_BIND_RENDER_TARGET) {
-      /* Check that the color surface is blendable, unless it's an
-       * integer format.
-       */
-      if (!svga_format_is_integer(svga_format) &&
-          (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
-         return FALSE;
-      }
-   }
-
-   mask.value = 0;
-   if (bindings & PIPE_BIND_RENDER_TARGET) {
-      mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
-   }
-   if (bindings & PIPE_BIND_DEPTH_STENCIL) {
-      mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
-   }
-   if (bindings & PIPE_BIND_SAMPLER_VIEW) {
-      mask.value |= SVGA3DFORMAT_OP_TEXTURE;
-   }
-
-   if (target == PIPE_TEXTURE_CUBE) {
-      mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
-   }
-   else if (target == PIPE_TEXTURE_3D) {
-      mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
-   }
-
-   return (caps.value & mask.value) == mask.value;
-}
-
-
 static void
 svga_fence_reference(struct pipe_screen *screen,
                      struct pipe_fence_handle **ptr,
@@ -934,6 +870,8 @@ svga_get_driver_query_info(struct pipe_screen *screen,
             PIPE_DRIVER_QUERY_TYPE_UINT64),
       QUERY("num-failed-allocations", SVGA_QUERY_NUM_FAILED_ALLOCATIONS,
             PIPE_DRIVER_QUERY_TYPE_UINT64),
+      QUERY("num-commands-per-draw", SVGA_QUERY_NUM_COMMANDS_PER_DRAW,
+            PIPE_DRIVER_QUERY_TYPE_FLOAT),
    };
 #undef QUERY
 
@@ -960,7 +898,7 @@ init_logging(struct pipe_screen *screen)
    svga_host_log(host_log);
 
    util_snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
-                 "%s%s (%s)", log_prefix, PACKAGE_VERSION, MESA_GIT_SHA1);
+                 "%s" PACKAGE_VERSION MESA_GIT_SHA1, log_prefix);
    svga_host_log(host_log);
 
    /* If the SVGA_EXTRA_LOGGING env var is set, log the process's command
@@ -981,14 +919,14 @@ static void
 svga_destroy_screen( struct pipe_screen *screen )
 {
    struct svga_screen *svgascreen = svga_screen(screen);
-   
+
    svga_screen_cache_cleanup(svgascreen);
 
    mtx_destroy(&svgascreen->swc_mutex);
    mtx_destroy(&svgascreen->tex_mutex);
 
    svgascreen->sws->destroy(svgascreen->sws);
-   
+
    FREE(svgascreen);
 }
 
@@ -1111,17 +1049,6 @@ svga_screen_create(struct svga_winsys_screen *sws)
       svgascreen->maxPointSize = 80.0F;
       svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
 
-      /* Multisample samples per pixel */
-      if (debug_get_bool_option("SVGA_MSAA", TRUE)) {
-         svgascreen->ms_samples =
-            get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
-      }
-
-      /* We only support 4x, 8x, 16x MSAA */
-      svgascreen->ms_samples &= ((1 << (4-1)) |
-                                 (1 << (8-1)) |
-                                 (1 << (16-1)));
-
       /* Maximum number of constant buffers */
       svgascreen->max_const_buffers =
          get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
@@ -1197,12 +1124,14 @@ error1:
    return NULL;
 }
 
+
 struct svga_winsys_screen *
 svga_winsys_screen(struct pipe_screen *screen)
 {
    return svga_screen(screen)->sws;
 }
 
+
 #ifdef DEBUG
 struct svga_screen *
 svga_screen(struct pipe_screen *screen)