*/
build = "build: DEBUG;";
mutex = "mutex: " PIPE_ATOMIC ";";
+#elif defined(VMX86_STATS)
+ build = "build: OPT;";
#else
build = "build: RELEASE;";
#endif
return 1;
case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
return sws->have_vgpu10;
+ case PIPE_CAP_CLEAR_TEXTURE:
+ return sws->have_vgpu10;
case PIPE_CAP_UMA:
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
case PIPE_CAP_TGSI_TXQS:
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
case PIPE_CAP_SHAREABLE_SHADERS:
- case PIPE_CAP_CLEAR_TEXTURE:
case PIPE_CAP_DRAW_PARAMETERS:
case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
uint64_t timeout)
{
struct svga_winsys_screen *sws = svga_screen(screen)->sws;
+ boolean retVal;
+
+ SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH);
- if (!timeout)
- return sws->fence_signalled(sws, fence, 0) == 0;
+ if (!timeout) {
+ retVal = sws->fence_signalled(sws, fence, 0) == 0;
+ }
+ else {
+ SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
+ __FUNCTION__, fence);
+
+ retVal = sws->fence_finish(sws, fence, 0) == 0;
+ }
- SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
- __FUNCTION__, fence);
+ SVGA_STATS_TIME_POP(sws);
- return sws->fence_finish(sws, fence, 0) == 0;
+ return retVal;
}