static unsigned
svga_get_extra_constants_common(struct svga_context *svga,
const struct svga_shader_variant *variant,
- unsigned shader, float *dest)
+ enum pipe_shader_type shader, float *dest)
{
uint32_t *dest_u = (uint32_t *) dest; // uint version of dest
unsigned i;
return count;
}
-/**
- * Check and emit one shader constant register.
- * \param shader PIPE_SHADER_FRAGMENT or PIPE_SHADER_VERTEX
- * \param i which float[4] constant to change
- * \param value the new float[4] value
- */
-static enum pipe_error
-emit_const(struct svga_context *svga, unsigned shader, unsigned i,
- const float *value)
-{
- enum pipe_error ret = PIPE_OK;
-
- assert(shader < PIPE_SHADER_TYPES);
- assert(i < SVGA3D_CONSTREG_MAX);
- assert(!svga_have_vgpu10(svga));
-
- if (memcmp(svga->state.hw_draw.cb[shader][i], value,
- 4 * sizeof(float)) != 0) {
- if (SVGA_DEBUG & DEBUG_CONSTS)
- debug_printf("%s %s %u: %f %f %f %f\n",
- __FUNCTION__,
- shader == PIPE_SHADER_VERTEX ? "VERT" : "FRAG",
- i,
- value[0],
- value[1],
- value[2],
- value[3]);
-
- ret = SVGA3D_SetShaderConst( svga->swc,
- i,
- svga_shader_type(shader),
- SVGA3D_CONST_TYPE_FLOAT,
- value );
- if (ret != PIPE_OK)
- return ret;
-
- memcpy(svga->state.hw_draw.cb[shader][i], value, 4 * sizeof(float));
- }
-
- return ret;
-}
-
/*
* Check and emit a range of shader constant registers, trying to coalesce
*/
static enum pipe_error
emit_const_range(struct svga_context *svga,
- unsigned shader,
+ enum pipe_shader_type shader,
unsigned offset,
unsigned count,
const float (*values)[4])
(j - i) * 4 * sizeof(float));
i = j + 1;
+
+ svga->hud.num_const_updates++;
+
} else {
++i;
}
* On VGPU10, emit_consts_vgpu10 is used instead.
*/
static enum pipe_error
-emit_consts_vgpu9(struct svga_context *svga, unsigned shader)
+emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
{
const struct pipe_constant_buffer *cbuf;
- struct svga_screen *ss = svga_screen(svga->pipe.screen);
struct pipe_transfer *transfer = NULL;
unsigned count;
const float (*data)[4] = NULL;
- unsigned i;
enum pipe_error ret = PIPE_OK;
const unsigned offset = 0;
}
/* sanity check */
- assert(cbuf->buffer->width0 >=
- cbuf->buffer_size);
+ assert(cbuf->buffer->width0 >= cbuf->buffer_size);
/* Use/apply the constant buffer size and offsets here */
count = cbuf->buffer_size / (4 * sizeof(float));
data += cbuf->buffer_offset / (4 * sizeof(float));
- if (ss->hw_version >= SVGA3D_HWVERSION_WS8_B1) {
- ret = emit_const_range( svga, shader, offset, count, data );
- }
- else {
- for (i = 0; i < count; i++) {
- ret = emit_const( svga, shader, offset + i, data[i] );
- if (ret != PIPE_OK) {
- break;
- }
- }
- }
+ ret = emit_const_range( svga, shader, offset, count, data );
pipe_buffer_unmap(&svga->pipe, transfer);
const struct svga_shader_variant *variant = NULL;
unsigned offset;
float extras[MAX_EXTRA_CONSTS][4];
- unsigned count, i;
+ unsigned count;
switch (shader) {
case PIPE_SHADER_VERTEX:
assert(variant);
offset = variant->shader->info.file_max[TGSI_FILE_CONSTANT] + 1;
- assert(count <= Elements(extras));
+ assert(count <= ARRAY_SIZE(extras));
if (count > 0) {
- if (ss->hw_version >= SVGA3D_HWVERSION_WS8_B1) {
- ret = emit_const_range(svga, shader, offset, count,
- (const float (*) [4])extras);
- }
- else {
- for (i = 0; i < count; i++) {
- ret = emit_const(svga, shader, offset + i, extras[i]);
- if (ret != PIPE_OK)
- return ret;
- }
- }
+ ret = emit_const_range(svga, shader, offset, count,
+ (const float (*) [4])extras);
}
}
static enum pipe_error
-emit_constbuf_vgpu10(struct svga_context *svga, unsigned shader)
+emit_constbuf_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
{
const struct pipe_constant_buffer *cbuf;
struct pipe_resource *dst_buffer = NULL;
void *src_map = NULL, *dst_map;
unsigned offset;
const struct svga_shader_variant *variant;
+ unsigned alloc_buf_size;
assert(shader == PIPE_SHADER_VERTEX ||
shader == PIPE_SHADER_GEOMETRY ||
*/
new_buf_size = align(new_buf_size, 16);
- u_upload_alloc(svga->const0_upload, 0, new_buf_size,
+ /* Constant buffer size in the upload buffer must be in multiples of 256.
+ * In order to maximize the chance of merging the upload buffer chunks
+ * when svga_buffer_add_range() is called,
+ * the allocate buffer size needs to be in multiples of 256 as well.
+ * Otherwise, since there is gap between each dirty range of the upload buffer,
+ * each dirty range will end up in its own UPDATE_GB_IMAGE command.
+ */
+ alloc_buf_size = align(new_buf_size, CONST0_UPLOAD_ALIGNMENT);
+
+ u_upload_alloc(svga->const0_upload, 0, alloc_buf_size,
CONST0_UPLOAD_ALIGNMENT, &offset,
&dst_buffer, &dst_map);
if (!dst_map) {
assert(extra_offset + extra_size <= new_buf_size);
memcpy((char *) dst_map + extra_offset, extras, extra_size);
}
- u_upload_unmap(svga->const0_upload);
- /* Issue the SetSingleConstantBuffer command */
- dst_handle = svga_buffer_handle(svga, dst_buffer);
- if (!dst_handle) {
- pipe_resource_reference(&dst_buffer, NULL);
- return PIPE_ERROR_OUT_OF_MEMORY;
+ /* Get winsys handle for the constant buffer */
+ if (svga->state.hw_draw.const0_buffer == dst_buffer &&
+ svga->state.hw_draw.const0_handle) {
+ /* re-reference already mapped buffer */
+ dst_handle = svga->state.hw_draw.const0_handle;
+ }
+ else {
+ /* we must unmap the buffer before getting the winsys handle */
+ u_upload_unmap(svga->const0_upload);
+
+ dst_handle = svga_buffer_handle(svga, dst_buffer);
+ if (!dst_handle) {
+ pipe_resource_reference(&dst_buffer, NULL);
+ return PIPE_ERROR_OUT_OF_MEMORY;
+ }
+
+ /* save the buffer / handle for next time */
+ pipe_resource_reference(&svga->state.hw_draw.const0_buffer, dst_buffer);
+ svga->state.hw_draw.const0_handle = dst_handle;
}
+ /* Issue the SetSingleConstantBuffer command */
assert(new_buf_size % 16 == 0);
ret = SVGA3D_vgpu10_SetSingleConstantBuffer(svga->swc,
0, /* index */
pipe_resource_reference(&dst_buffer, NULL);
+ svga->hud.num_const_buf_updates++;
+
return ret;
}
static enum pipe_error
-emit_consts_vgpu10(struct svga_context *svga, unsigned shader)
+emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
{
enum pipe_error ret;
unsigned dirty_constbufs;
size);
if (ret != PIPE_OK)
return ret;
+
+ svga->hud.num_const_buf_updates++;
}
svga->state.hw_draw.enabled_constbufs[shader] = enabled_constbufs;
"hw fs params",
(SVGA_NEW_FS_CONST_BUFFER |
SVGA_NEW_FS_VARIANT |
- SVGA_NEW_TEXTURE_BINDING),
+ SVGA_NEW_TEXTURE_CONSTS),
emit_fs_consts
};