struct svga_shader_emitter
{
- boolean use_sm30;
-
unsigned size;
char *buf;
char *ptr;
- union svga_compile_key key;
+ struct svga_compile_key key;
struct tgsi_shader_info info;
int unit;
int imm_start;
- int nr_hw_const;
+ int nr_hw_float_const;
+ int nr_hw_int_const;
int nr_hw_temp;
int insn_offset;
int internal_frontface_idx;
int ps30_input_count;
+ int vs30_output_count;
+
+ int dynamic_branching_level;
boolean in_main_func;
boolean created_loop_const;
int loop_const_idx;
- boolean created_sincos_consts;
- int sincos_consts_idx;
+ unsigned inverted_texcoords; /**< bitmask of which texcoords are flipped */
+ struct src_register ps_true_texcoord[PIPE_MAX_ATTRIBS];
+ struct src_register ps_inverted_texcoord[PIPE_MAX_ATTRIBS];
+ unsigned ps_inverted_texcoord_input[PIPE_MAX_ATTRIBS];
unsigned label[32];
unsigned nr_labels;
struct src_register input_map[PIPE_MAX_ATTRIBS];
SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
+ boolean ps_reads_pos;
+ boolean emitted_depth_fog;
+ struct src_register ps_true_pos;
+ struct src_register ps_depth_pos;
+ SVGA3dShaderDestToken ps_temp_pos;
+
+ /* shared input for depth and fog */
+ struct src_register ps_depth_fog;
+
struct src_register imm_0055;
SVGA3dShaderDestToken temp_pos;
SVGA3dShaderDestToken true_pos;
+ SVGA3dShaderDestToken depth_pos;
+
+ /* shared output for depth and fog */
+ SVGA3dShaderDestToken vs_depth_fog;
SVGA3dShaderDestToken temp_col[PIPE_MAX_COLOR_BUFS];
SVGA3dShaderDestToken true_col[PIPE_MAX_COLOR_BUFS];
boolean svga_shader_emit_instructions( struct svga_shader_emitter *emit,
const struct tgsi_token *tokens );
-boolean svga_translate_decl_sm20( struct svga_shader_emitter *emit,
- const struct tgsi_full_declaration *decl );
-
boolean svga_translate_decl_sm30( struct svga_shader_emitter *emit,
const struct tgsi_full_declaration *decl );
SVGA3dShaderDestToken dest )
{
assert(dest.reserved0);
+ assert(dest.mask);
return svga_shader_emit_dword( emit, dest.value );
}
}
+static INLINE boolean emit_op4( struct svga_shader_emitter *emit,
+ SVGA3dShaderInstToken inst,
+ SVGA3dShaderDestToken dest,
+ struct src_register src0,
+ struct src_register src1,
+ struct src_register src2,
+ struct src_register src3)
+{
+ return (emit_instruction( emit, inst ) &&
+ emit_dst( emit, dest ) &&
+ emit_src( emit, src0 ) &&
+ emit_src( emit, src1 ) &&
+ emit_src( emit, src2 ) &&
+ emit_src( emit, src3 ));
+}
+
+
#define TRANSLATE_SWIZZLE(x,y,z,w) ((x) | ((y) << 2) | ((z) << 4) | ((w) << 6))
#define SWIZZLE_XYZW \
TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_W)
return inst;
}
+
+/**
+ * Create an instance of a SVGA3dShaderDestToken.
+ * Note that this function is used to create tokens for output registers,
+ * temp registers AND constants (see emit_def_const()).
+ */
static INLINE SVGA3dShaderDestToken
dst_register( unsigned file,
int number )
{
SVGA3dShaderDestToken dest;
+ /* check values against bitfield sizes */
+ assert(number < (1 << 11));
+ assert(file <= SVGA3DREG_PREDICATE);
+
dest.value = 0;
dest.num = number;
dest.type_upper = file >> 3;
writemask( SVGA3dShaderDestToken dest,
unsigned mask )
{
+ assert(dest.mask & mask);
dest.mask &= mask;
return dest;
}
{
SVGA3dShaderSrcToken src;
+ /* check values against bitfield sizes */
+ assert(number < (1 << 11));
+ assert(file <= SVGA3DREG_PREDICATE);
+
src.value = 0;
src.num = number;
src.type_upper = file >> 3;
case PIPE_TEXTURE_1D:
return SVGA3DSAMP_2D;
case PIPE_TEXTURE_2D:
+ case PIPE_TEXTURE_RECT:
return SVGA3DSAMP_2D;
case PIPE_TEXTURE_3D:
return SVGA3DSAMP_VOLUME;