static boolean emit_ps_postamble( struct svga_shader_emitter *emit );
-static unsigned
-translate_opcode(uint opcode)
+static SVGA3dShaderOpCodeType
+translate_opcode(enum tgsi_opcode opcode)
{
switch (opcode) {
- case TGSI_OPCODE_ABS: return SVGA3DOP_ABS;
case TGSI_OPCODE_ADD: return SVGA3DOP_ADD;
- case TGSI_OPCODE_DP2A: return SVGA3DOP_DP2ADD;
case TGSI_OPCODE_DP3: return SVGA3DOP_DP3;
case TGSI_OPCODE_DP4: return SVGA3DOP_DP4;
case TGSI_OPCODE_FRC: return SVGA3DOP_FRC;
}
-static unsigned
-translate_file(unsigned file)
+static SVGA3dShaderRegType
+translate_file(enum tgsi_file_type file)
{
switch (file) {
case TGSI_FILE_TEMPORARY: return SVGA3DREG_TEMP;
static boolean
svga_arl_needs_adjustment( const struct svga_shader_emitter *emit )
{
- int i;
+ unsigned i;
for (i = 0; i < emit->num_arl_consts; ++i) {
if (emit->arl_consts[i].arl_num == emit->current_arl)
static int
svga_arl_adjustment( const struct svga_shader_emitter *emit )
{
- int i;
+ unsigned i;
for (i = 0; i < emit->num_arl_consts; ++i) {
if (emit->arl_consts[i].arl_num == emit->current_arl)
* in one slot at least:
*/
assert(type1 == SVGA3DREG_SAMPLER);
+ (void) type1;
if (type0 == SVGA3DREG_CONST &&
((type3 == SVGA3DREG_CONST && src0.base.num != src3.base.num) ||
}
if (!emit_instruction(emit, opcode) ||
- !svga_shader_emit_dwords( emit, def.values, Elements(def.values)))
+ !svga_shader_emit_dwords( emit, def.values, ARRAY_SIZE(def.values)))
return FALSE;
return TRUE;
const struct src_register src1 =
translate_src_register(emit, &insn->Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
- int i;
+ unsigned i;
/* For each enabled element, perform a RCP instruction. Note that
* RCP is scalar in SVGA3D:
}
-/**
- * Translate the following TGSI DPH instruction.
- * DPH DST, SRC1, SRC2
- * To the following SVGA3D instruction sequence.
- * DP3 TMP, SRC1, SRC2
- * ADD DST, TMP, SRC2.wwww
- */
-static boolean
-emit_dph(struct svga_shader_emitter *emit,
- const struct tgsi_full_instruction *insn )
-{
- SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
- const struct src_register src0 = translate_src_register(
- emit, &insn->Src[0] );
- struct src_register src1 =
- translate_src_register(emit, &insn->Src[1]);
- SVGA3dShaderDestToken temp = get_temp( emit );
-
- /* DP3 TMP, SRC1, SRC2 */
- if (!submit_op2( emit, inst_token( SVGA3DOP_DP3 ), temp, src0, src1 ))
- return FALSE;
-
- src1 = scalar(src1, TGSI_SWIZZLE_W);
-
- /* ADD DST, TMP, SRC2.wwww */
- if (!submit_op2( emit, inst_token( SVGA3DOP_ADD ), dst,
- src( temp ), src1 ))
- return FALSE;
-
- return TRUE;
-}
-
-
/**
* Sine / Cosine helper function.
*/
}
-/**
- * Translate/emit a TGSI SIN, COS or CSC instruction.
- */
-static boolean
-emit_sincos(struct svga_shader_emitter *emit,
- const struct tgsi_full_instruction *insn)
-{
- SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
- struct src_register src0 = translate_src_register(emit, &insn->Src[0]);
- SVGA3dShaderDestToken temp = get_temp( emit );
-
- /* SCS TMP SRC */
- if (!do_emit_sincos(emit, writemask(temp, TGSI_WRITEMASK_XY), src0 ))
- return FALSE;
-
- /* MOV DST TMP */
- if (!submit_op1( emit, inst_token( SVGA3DOP_MOV ), dst, src( temp ) ))
- return FALSE;
-
- return TRUE;
-}
-
-
/**
* Translate TGSI SIN instruction into:
* SCS TMP SRC
}
-/**
- * Translate/emit TGSI SUB instruction as:
- * ADD DST, SRC0, negate(SRC1)
- */
-static boolean
-emit_sub(struct svga_shader_emitter *emit,
- const struct tgsi_full_instruction *insn)
-{
- SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
- struct src_register src0 = translate_src_register(
- emit, &insn->Src[0] );
- struct src_register src1 = translate_src_register(
- emit, &insn->Src[1] );
-
- src1 = negate(src1);
-
- if (!submit_op2( emit, inst_token( SVGA3DOP_ADD ), dst,
- src0, src1 ))
- return FALSE;
-
- return TRUE;
-}
-
-
/**
* Translate/emit KILL_IF instruction (kill if any of X,Y,Z,W are negative).
*/
*/
static boolean
emit_conditional(struct svga_shader_emitter *emit,
- unsigned compare_func,
+ enum pipe_compare_func compare_func,
SVGA3dShaderDestToken dst,
struct src_register src0,
struct src_register src1,
*/
static boolean
emit_select(struct svga_shader_emitter *emit,
- unsigned compare_func,
+ enum pipe_compare_func compare_func,
SVGA3dShaderDestToken dst,
struct src_register src0,
struct src_register src1 )
const unsigned swizzleIn[4] = {swizzle_x, swizzle_y, swizzle_z, swizzle_w};
unsigned srcSwizzle[4];
unsigned srcWritemask = 0x0, zeroWritemask = 0x0, oneWritemask = 0x0;
- int i;
+ unsigned i;
/* build writemasks and srcSwizzle terms */
for (i = 0; i < 4; i++) {
- if (swizzleIn[i] == PIPE_SWIZZLE_ZERO) {
+ if (swizzleIn[i] == PIPE_SWIZZLE_0) {
srcSwizzle[i] = TGSI_SWIZZLE_X + i;
zeroWritemask |= (1 << i);
}
- else if (swizzleIn[i] == PIPE_SWIZZLE_ONE) {
+ else if (swizzleIn[i] == PIPE_SWIZZLE_1) {
srcSwizzle[i] = TGSI_SWIZZLE_X + i;
oneWritemask |= (1 << i);
}
PIPE_TEX_COMPARE_R_TO_TEXTURE);
/* texture swizzle */
- boolean swizzle = (emit->key.tex[unit].swizzle_r != PIPE_SWIZZLE_RED ||
- emit->key.tex[unit].swizzle_g != PIPE_SWIZZLE_GREEN ||
- emit->key.tex[unit].swizzle_b != PIPE_SWIZZLE_BLUE ||
- emit->key.tex[unit].swizzle_a != PIPE_SWIZZLE_ALPHA);
+ boolean swizzle = (emit->key.tex[unit].swizzle_r != PIPE_SWIZZLE_X ||
+ emit->key.tex[unit].swizzle_g != PIPE_SWIZZLE_Y ||
+ emit->key.tex[unit].swizzle_b != PIPE_SWIZZLE_Z ||
+ emit->key.tex[unit].swizzle_a != PIPE_SWIZZLE_W);
boolean saturate = insn->Instruction.Saturate;
*/
static boolean
emit_scalar_op1(struct svga_shader_emitter *emit,
- unsigned opcode,
+ SVGA3dShaderOpCodeType opcode,
const struct tgsi_full_instruction *insn)
{
SVGA3dShaderInstToken inst;
*/
static boolean
emit_simple_instruction(struct svga_shader_emitter *emit,
- unsigned opcode,
+ SVGA3dShaderOpCodeType opcode,
const struct tgsi_full_instruction *insn)
{
const struct tgsi_full_src_register *src = insn->Src;
return TRUE;
}
else {
- unsigned opcode;
+ SVGA3dShaderOpCodeType opcode;
const struct tgsi_full_src_register *reg = &insn->Src[0];
SVGA3dShaderInstToken inst;
SVGA3dShaderDestToken dst;
}
-/**
- * Translate/emit TGSI XPD (vector cross product) instruction.
- */
-static boolean
-emit_xpd(struct svga_shader_emitter *emit,
- const struct tgsi_full_instruction *insn)
-{
- SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
- const struct src_register src0 = translate_src_register(
- emit, &insn->Src[0] );
- const struct src_register src1 = translate_src_register(
- emit, &insn->Src[1] );
- boolean need_dst_tmp = FALSE;
-
- /* XPD can only output to a temporary */
- if (SVGA3dShaderGetRegType(dst.value) != SVGA3DREG_TEMP)
- need_dst_tmp = TRUE;
-
- /* The dst reg must not be the same as src0 or src1*/
- if (alias_src_dst(src0, dst) ||
- alias_src_dst(src1, dst))
- need_dst_tmp = TRUE;
-
- if (need_dst_tmp) {
- SVGA3dShaderDestToken tmp = get_temp( emit );
-
- /* Obey DX9 restrictions on mask:
- */
- tmp.mask = dst.mask & TGSI_WRITEMASK_XYZ;
-
- if (!submit_op2(emit, inst_token( SVGA3DOP_CRS ), tmp, src0, src1))
- return FALSE;
-
- if (!submit_op1(emit, inst_token( SVGA3DOP_MOV ), dst, src( tmp )))
- return FALSE;
- }
- else {
- if (!submit_op2(emit, inst_token( SVGA3DOP_CRS ), dst, src0, src1))
- return FALSE;
- }
-
- /* Need to emit 1.0 to dst.w?
- */
- if (dst.mask & TGSI_WRITEMASK_W) {
- struct src_register one = get_one_immediate( emit );
-
- if (!submit_op1(emit,
- inst_token( SVGA3DOP_MOV ),
- writemask(dst, TGSI_WRITEMASK_W),
- one))
- return FALSE;
- }
-
- return TRUE;
-}
-
-
/**
* Emit a LRP (linear interpolation) instruction.
*/
break;
}
- if (emit->nr_labels == Elements(emit->label))
+ if (emit->nr_labels == ARRAY_SIZE(emit->label))
return FALSE;
if (i == emit->nr_labels) {
case TGSI_OPCODE_DP2:
return emit_dp2( emit, insn );
- case TGSI_OPCODE_DPH:
- return emit_dph( emit, insn );
-
case TGSI_OPCODE_COS:
return emit_cos( emit, insn );
case TGSI_OPCODE_SIN:
return emit_sin( emit, insn );
- case TGSI_OPCODE_SCS:
- return emit_sincos( emit, insn );
-
case TGSI_OPCODE_END:
/* TGSI always finishes the main func with an END */
return emit_end( emit );
case TGSI_OPCODE_SLE:
return emit_select_op( emit, PIPE_FUNC_LEQUAL, insn );
- case TGSI_OPCODE_SUB:
- return emit_sub( emit, insn );
-
case TGSI_OPCODE_POW:
return emit_pow( emit, insn );
/* These aren't actually used by any of the frontends we care
* about:
*/
- case TGSI_OPCODE_CLAMP:
case TGSI_OPCODE_AND:
case TGSI_OPCODE_OR:
case TGSI_OPCODE_I2F:
case TGSI_OPCODE_BRK:
return emit_brk( emit, insn );
- case TGSI_OPCODE_XPD:
- return emit_xpd( emit, insn );
-
case TGSI_OPCODE_KILL:
return emit_kill( emit, insn );
default:
{
- unsigned opcode = translate_opcode(insn->Instruction.Opcode);
+ SVGA3dShaderOpCodeType opcode =
+ translate_opcode(insn->Instruction.Opcode);
if (opcode == SVGA3DOP_LAST_INST)
return FALSE;
unsigned i;
assert(1 <= imm->Immediate.NrTokens && imm->Immediate.NrTokens <= 5);
- for (i = 0; i < imm->Immediate.NrTokens - 1; i++) {
+ for (i = 0; i < 4 && i < imm->Immediate.NrTokens - 1; i++) {
float f = imm->u[i].Float;
value[i] = util_is_inf_or_nan(f) ? 0.0f : f;
}
struct src_register back[2];
SVGA3dShaderDestToken color[2];
int count = emit->internal_color_count;
- int i;
+ unsigned i;
SVGA3dShaderInstToken if_token;
if (count == 0)
assert(emit->inverted_texcoords & (1 << unit));
- assert(unit < Elements(emit->ps_true_texcoord));
+ assert(unit < ARRAY_SIZE(emit->ps_true_texcoord));
- assert(unit < Elements(emit->ps_inverted_texcoord_input));
+ assert(unit < ARRAY_SIZE(emit->ps_inverted_texcoord_input));
assert(emit->ps_inverted_texcoord_input[unit]
- < Elements(emit->input_map));
+ < ARRAY_SIZE(emit->input_map));
/* inverted = coord * (1, -1, 1, 1) + (0, 1, 0, 0) */
if (!submit_op3(emit,
if (emit->inverted_texcoords)
return TRUE;
- /* look for any PIPE_SWIZZLE_ZERO/ONE terms */
+ /* look for any PIPE_SWIZZLE_0/ONE terms */
for (i = 0; i < emit->key.num_textures; i++) {
- if (emit->key.tex[i].swizzle_r > PIPE_SWIZZLE_ALPHA ||
- emit->key.tex[i].swizzle_g > PIPE_SWIZZLE_ALPHA ||
- emit->key.tex[i].swizzle_b > PIPE_SWIZZLE_ALPHA ||
- emit->key.tex[i].swizzle_a > PIPE_SWIZZLE_ALPHA)
+ if (emit->key.tex[i].swizzle_r > PIPE_SWIZZLE_W ||
+ emit->key.tex[i].swizzle_g > PIPE_SWIZZLE_W ||
+ emit->key.tex[i].swizzle_b > PIPE_SWIZZLE_W ||
+ emit->key.tex[i].swizzle_a > PIPE_SWIZZLE_W)
return TRUE;
}
emit->info.opcode_count[TGSI_OPCODE_SEQ] >= 1 ||
emit->info.opcode_count[TGSI_OPCODE_EXP] >= 1 ||
emit->info.opcode_count[TGSI_OPCODE_LOG] >= 1 ||
- emit->info.opcode_count[TGSI_OPCODE_XPD] >= 1 ||
emit->info.opcode_count[TGSI_OPCODE_KILL] >= 1)
return TRUE;
pre_parse_add_indirect( struct svga_shader_emitter *emit,
int num, int current_arl)
{
- int i;
+ unsigned i;
assert(num < 0);
for (i = 0; i < emit->num_arl_consts; ++i) {
}
if (emit->unit == PIPE_SHADER_FRAGMENT) {
+ if (!svga_shader_emit_samplers_decl( emit ))
+ return FALSE;
+
if (!emit_ps_preamble( emit ))
return FALSE;
if (emit->unit == PIPE_SHADER_FRAGMENT && emit->key.fs.pstipple) {
unsigned unit;
- new_tokens = util_pstipple_create_fragment_shader(tokens, &unit, 0);
+ new_tokens = util_pstipple_create_fragment_shader(tokens, &unit, 0,
+ TGSI_FILE_INPUT);
if (new_tokens) {
/* Setup texture state for stipple */
- emit->key.tex[unit].texture_target = PIPE_TEXTURE_2D;
+ emit->sampler_target[unit] = TGSI_TEXTURE_2D;
emit->key.tex[unit].swizzle_r = TGSI_SWIZZLE_X;
emit->key.tex[unit].swizzle_g = TGSI_SWIZZLE_Y;
emit->key.tex[unit].swizzle_b = TGSI_SWIZZLE_Z;
projects / mesa.git / blobdiff