/* Samplers */
unsigned num_samplers;
+ ubyte sampler_target[PIPE_MAX_SAMPLERS]; /**< TGSI_TEXTURE_x */
+ ubyte sampler_return_type[PIPE_MAX_SAMPLERS]; /**< TGSI_RETURN_TYPE_x */
/* Address regs (really implemented with temps) */
unsigned num_address_regs;
/* user clip plane constant slot indexes */
unsigned clip_plane_const[PIPE_MAX_CLIP_PLANES];
+ unsigned num_output_writes;
+ boolean constant_color_output;
+
boolean uses_flat_interp;
/* For all shaders: const reg index for RECT coord scaling */
else
new_buf = NULL;
- if (new_buf == NULL) {
+ if (!new_buf) {
emit->ptr = err_buf;
emit->buf = err_buf;
emit->size = sizeof(err_buf);
FREE(emit);
}
-static INLINE boolean
+static inline boolean
reserve(struct svga_shader_emitter_v10 *emit,
unsigned nr_dwords)
{
boolean indirect, boolean index2D,
unsigned tempArrayID)
{
- unsigned indexDim, index0Rep, index1Rep = VGPU10_OPERAND_INDEX_0D;
+ unsigned indexDim, index0Rep, index1Rep = VGPU10_OPERAND_INDEX_IMMEDIATE32;
/*
* Compute index dimensions
*/
assert(sem_name == TGSI_SEMANTIC_COLOR);
index = emit->info.output_semantic_index[index];
+
+ emit->num_output_writes++;
}
}
}
}
}
else if (file == TGSI_FILE_SYSTEM_VALUE) {
- assert(index < Elements(emit->system_value_indexes));
+ assert(index < ARRAY_SIZE(emit->system_value_indexes));
index = emit->system_value_indexes[index];
}
}
if (operand0.operandType == VGPU10_OPERAND_TYPE_IMMEDIATE32) {
/* Emit the four float/int in-line immediate values */
unsigned *c;
- assert(index < Elements(emit->immediates));
+ assert(index < ARRAY_SIZE(emit->immediates));
assert(file == TGSI_FILE_IMMEDIATE);
assert(swizzleX < 4);
assert(swizzleY < 4);
/** Return the named swizzle term from the src register */
-static INLINE unsigned
+static inline unsigned
get_swizzle(const struct tgsi_full_src_register *reg, unsigned term)
{
switch (term) {
{
unsigned n = emit->num_immediates++;
assert(!emit->immediates_emitted);
- assert(n < Elements(emit->immediates));
+ assert(n < ARRAY_SIZE(emit->immediates));
emit->immediates[n][0] = imm[0];
emit->immediates[n][1] = imm[1];
emit->immediates[n][2] = imm[2];
/**
- * Allocate space for a int[4] immediate.
+ * Allocate space for an int[4] immediate.
* \return the index/position of the immediate.
*/
static unsigned
static unsigned
alloc_system_value_index(struct svga_shader_emitter_v10 *emit, unsigned index)
{
- const unsigned n = emit->info.num_inputs + index;
- assert(index < Elements(emit->system_value_indexes));
+ const unsigned n = emit->info.file_max[TGSI_FILE_INPUT] + 1 + index;
+ assert(index < ARRAY_SIZE(emit->system_value_indexes));
emit->system_value_indexes[index] = n;
return n;
}
switch (prop->Property.PropertyName) {
case TGSI_PROPERTY_GS_INPUT_PRIM:
- assert(prop->u[0].Data < Elements(primType));
+ assert(prop->u[0].Data < ARRAY_SIZE(primType));
emit->gs.prim_type = primType[prop->u[0].Data];
assert(emit->gs.prim_type != VGPU10_PRIMITIVE_UNDEFINED);
emit->gs.input_size = inputArraySize[emit->gs.prim_type];
break;
case TGSI_PROPERTY_GS_OUTPUT_PRIM:
- assert(prop->u[0].Data < Elements(primTopology));
+ assert(prop->u[0].Data < ARRAY_SIZE(primTopology));
emit->gs.prim_topology = primTopology[prop->u[0].Data];
assert(emit->gs.prim_topology != VGPU10_PRIMITIVE_TOPOLOGY_UNDEFINED);
break;
* have linked due to constbuf index out of bounds, so we shouldn't
* have reached here.
*/
- assert(constbuf < Elements(emit->num_shader_consts));
+ assert(constbuf < ARRAY_SIZE(emit->num_shader_consts));
num_consts = MAX2(emit->num_shader_consts[constbuf],
decl->Range.Last + 1);
emit->num_samplers = MAX2(emit->num_samplers, decl->Range.Last + 1);
return TRUE;
+#if 0
case TGSI_FILE_RESOURCE:
/*opcode0.opcodeType = VGPU10_OPCODE_DCL_RESOURCE;*/
/* XXX more, VGPU10_RETURN_TYPE_FLOAT */
assert(!"TGSI_FILE_RESOURCE not handled yet");
return FALSE;
+#endif
case TGSI_FILE_ADDRESS:
emit->num_address_regs = MAX2(emit->num_address_regs,
return TRUE;
case TGSI_FILE_SAMPLER_VIEW:
- /* Not used at this time, but maybe in the future.
- * See emit_resource_declarations().
- */
+ {
+ unsigned unit = decl->Range.First;
+ assert(decl->Range.First == decl->Range.Last);
+ emit->sampler_target[unit] = decl->SamplerView.Resource;
+ /* Note: we can ignore YZW return types for now */
+ emit->sampler_return_type[unit] = decl->SamplerView.ReturnTypeX;
+ }
return TRUE;
default:
else {
assert(emit->unit == PIPE_SHADER_VERTEX);
- for (i = 0; i < emit->info.num_inputs; i++) {
+ for (i = 0; i < emit->info.file_max[TGSI_FILE_INPUT] + 1; i++) {
unsigned usage_mask = emit->info.input_usage_mask[i];
unsigned index = i;
if (emit->unit == PIPE_SHADER_FRAGMENT) {
if (semantic_name == TGSI_SEMANTIC_COLOR) {
- assert(semantic_index < Elements(emit->fs.color_out_index));
+ assert(semantic_index < ARRAY_SIZE(emit->fs.color_out_index));
emit->fs.color_out_index[semantic_index] = index;
total_temps = emit->num_shader_temps;
+ /* If there is indirect access to non-indexable temps in the shader,
+ * convert those temps to indexable temps. This works around a bug
+ * in the GLSL->TGSI translator exposed in piglit test
+ * glsl-1.20/execution/fs-const-array-of-struct-of-array.shader_test.
+ * Internal temps added by the driver remain as non-indexable temps.
+ */
+ if ((emit->info.indirect_files & (1 << TGSI_FILE_TEMPORARY)) &&
+ emit->num_temp_arrays == 0) {
+ unsigned arrayID;
+
+ arrayID = 1;
+ emit->num_temp_arrays = arrayID + 1;
+ emit->temp_arrays[arrayID].start = 0;
+ emit->temp_arrays[arrayID].size = total_temps;
+
+ /* Fill in the temp_map entries for this temp array */
+ for (i = 0; i < total_temps; i++) {
+ emit->temp_map[i].arrayId = arrayID;
+ emit->temp_map[i].index = i;
+ }
+ }
+
/* Allocate extra temps for specially-implemented instructions,
* such as LIT.
*/
}
else if (emit->unit == PIPE_SHADER_FRAGMENT) {
if (emit->key.fs.alpha_func != SVGA3D_CMP_ALWAYS ||
+ emit->key.fs.white_fragments ||
emit->key.fs.write_color0_to_n_cbufs > 1) {
/* Allocate a temp to hold the output color */
emit->fs.color_tmp_index = total_temps;
emit->temp_map[i].index = reg++;
}
}
- total_temps = reg;
if (0) {
debug_printf("total_temps %u\n", total_temps);
- for (i = 0; i < 30; i++) {
+ for (i = 0; i < total_temps; i++) {
debug_printf("temp %u -> array %u index %u\n",
i, emit->temp_map[i].arrayId, emit->temp_map[i].index);
}
}
+ total_temps = reg;
+
/* Emit declaration of ordinary temp registers */
if (total_temps > 0) {
VGPU10OpcodeToken0 opcode0;
/* Texture buffer sizes */
for (i = 0; i < emit->num_samplers; i++) {
- if (emit->key.tex[i].texture_target == PIPE_BUFFER) {
+ if (emit->sampler_target[i] == TGSI_TEXTURE_BUFFER) {
emit->texture_buffer_size_index[i] = total_consts++;
}
}
}
/* Declare remaining constant buffers (UBOs) */
- for (i = 1; i < Elements(emit->num_shader_consts); i++) {
+ for (i = 1; i < ARRAY_SIZE(emit->num_shader_consts); i++) {
if (emit->num_shader_consts[i] > 0) {
begin_emit_instruction(emit);
emit_dword(emit, opcode0.value);
/**
- * Translate PIPE_TEXTURE_x to VGAPU10_RESOURCE_DIMENSION_x.
+ * Translate TGSI_TEXTURE_x to VGAPU10_RESOURCE_DIMENSION_x.
*/
static unsigned
-pipe_texture_to_resource_dimension(unsigned target, bool msaa)
+tgsi_texture_to_resource_dimension(unsigned target, boolean is_array)
{
switch (target) {
- case PIPE_BUFFER:
+ case TGSI_TEXTURE_BUFFER:
return VGPU10_RESOURCE_DIMENSION_BUFFER;
- case PIPE_TEXTURE_1D:
+ case TGSI_TEXTURE_1D:
return VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
- case PIPE_TEXTURE_2D:
- case PIPE_TEXTURE_RECT:
- return msaa ? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMS
- : VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
- case PIPE_TEXTURE_3D:
+ case TGSI_TEXTURE_2D:
+ case TGSI_TEXTURE_RECT:
+ return VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
+ case TGSI_TEXTURE_3D:
return VGPU10_RESOURCE_DIMENSION_TEXTURE3D;
- case PIPE_TEXTURE_CUBE:
+ case TGSI_TEXTURE_CUBE:
return VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
- case PIPE_TEXTURE_1D_ARRAY:
- return VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY;
- case PIPE_TEXTURE_2D_ARRAY:
- return msaa ? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMSARRAY
- : VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY;
- case PIPE_TEXTURE_CUBE_ARRAY:
+ case TGSI_TEXTURE_SHADOW1D:
+ return VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
+ case TGSI_TEXTURE_SHADOW2D:
+ case TGSI_TEXTURE_SHADOWRECT:
+ return VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
+ case TGSI_TEXTURE_1D_ARRAY:
+ case TGSI_TEXTURE_SHADOW1D_ARRAY:
+ return is_array ? VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY
+ : VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
+ case TGSI_TEXTURE_2D_ARRAY:
+ case TGSI_TEXTURE_SHADOW2D_ARRAY:
+ return is_array ? VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY
+ : VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
+ case TGSI_TEXTURE_SHADOWCUBE:
+ return VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
+ case TGSI_TEXTURE_2D_MSAA:
+ return VGPU10_RESOURCE_DIMENSION_TEXTURE2DMS;
+ case TGSI_TEXTURE_2D_ARRAY_MSAA:
+ return is_array ? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMSARRAY
+ : VGPU10_RESOURCE_DIMENSION_TEXTURE2DMS;
+ case TGSI_TEXTURE_CUBE_ARRAY:
return VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY;
default:
assert(!"Unexpected resource type");
opcode0.value = 0;
opcode0.opcodeType = VGPU10_OPCODE_DCL_RESOURCE;
opcode0.resourceDimension =
- pipe_texture_to_resource_dimension(emit->key.tex[i].texture_target,
- emit->key.tex[i].texture_msaa);
+ tgsi_texture_to_resource_dimension(emit->sampler_target[i],
+ emit->key.tex[i].is_array);
operand0.value = 0;
operand0.numComponents = VGPU10_OPERAND_0_COMPONENT;
operand0.operandType = VGPU10_OPERAND_TYPE_RESOURCE;
STATIC_ASSERT(VGPU10_RETURN_TYPE_SINT == TGSI_RETURN_TYPE_SINT + 1);
STATIC_ASSERT(VGPU10_RETURN_TYPE_UINT == TGSI_RETURN_TYPE_UINT + 1);
STATIC_ASSERT(VGPU10_RETURN_TYPE_FLOAT == TGSI_RETURN_TYPE_FLOAT + 1);
- assert(emit->key.tex[i].return_type <= TGSI_RETURN_TYPE_FLOAT);
- rt = emit->key.tex[i].return_type + 1;
+ assert(emit->sampler_return_type[i] <= TGSI_RETURN_TYPE_FLOAT);
+ rt = emit->sampler_return_type[i] + 1;
#else
- switch (emit->key.tex[i].return_type) {
+ switch (emit->sampler_return_type[i]) {
case TGSI_RETURN_TYPE_UNORM: rt = VGPU10_RETURN_TYPE_UNORM; break;
case TGSI_RETURN_TYPE_SNORM: rt = VGPU10_RETURN_TYPE_SNORM; break;
case TGSI_RETURN_TYPE_SINT: rt = VGPU10_RETURN_TYPE_SINT; break;
unsigned i;
unsigned clip_plane_enable = emit->key.clip_plane_enable;
unsigned clip_dist_tmp_index = emit->clip_dist_tmp_index;
- unsigned num_written_clipdist = emit->info.num_written_clipdistance;
+ int num_written_clipdist = emit->info.num_written_clipdistance;
assert(emit->clip_dist_out_index != INVALID_INDEX);
assert(emit->clip_dist_tmp_index != INVALID_INDEX);
*/
emit->clip_dist_tmp_index = INVALID_INDEX;
- for (i = 0; i < 2 && num_written_clipdist; i++, num_written_clipdist-=4) {
+ for (i = 0; i < 2 && num_written_clipdist > 0; i++, num_written_clipdist-=4) {
tmp_clip_dist_src = make_src_temp_reg(clip_dist_tmp_index + i);
}
-/**
- * Emit code for TGSI_OPCODE_ABS instruction.
- */
-static boolean
-emit_abs(struct svga_shader_emitter_v10 *emit,
- const struct tgsi_full_instruction *inst)
-{
- /* dst = ABS(s0):
- * dst = abs(s0)
- * Translates into:
- * MOV dst, abs(s0)
- */
- struct tgsi_full_src_register abs_src0 = absolute_src(&inst->Src[0]);
-
- /* MOV dst, abs(s0) */
- emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &inst->Dst[0],
- &abs_src0, inst->Instruction.Saturate);
-
- return TRUE;
-}
-
-
/**
* Emit code for TGSI_OPCODE_ARL or TGSI_OPCODE_UARL instruction.
*/
}
-/**
- * Emit code for TGSI_OPCODE_SUB instruction.
- */
-static boolean
-emit_sub(struct svga_shader_emitter_v10 *emit,
- const struct tgsi_full_instruction *inst)
-{
- /* dst = SUB(s0, s1):
- * dst = s0 - s1
- * Translates into:
- * ADD dst, s0, neg(s1)
- */
- struct tgsi_full_src_register neg_src1 = negate_src(&inst->Src[1]);
-
- /* ADD dst, s0, neg(s1) */
- emit_instruction_op2(emit, VGPU10_OPCODE_ADD, &inst->Dst[0],
- &inst->Src[0], &neg_src1,
- inst->Instruction.Saturate);
-
- return TRUE;
-}
-
-
/**
* Emit a comparison instruction. The dest register will get
* 0 or ~0 values depending on the outcome of comparing src0 to src1.
unsigned swz_b = emit->key.tex[swz->unit].swizzle_b;
unsigned swz_a = emit->key.tex[swz->unit].swizzle_a;
unsigned writemask_0 = 0, writemask_1 = 0;
- boolean int_tex = is_integer_type(emit->key.tex[swz->unit].return_type);
+ boolean int_tex = is_integer_type(emit->sampler_return_type[swz->unit]);
/* Swizzle w/out zero/one terms */
struct tgsi_full_src_register src_swizzled =
swizzle_src(&swz->tmp_src,
- swz_r < PIPE_SWIZZLE_ZERO ? swz_r : PIPE_SWIZZLE_RED,
- swz_g < PIPE_SWIZZLE_ZERO ? swz_g : PIPE_SWIZZLE_GREEN,
- swz_b < PIPE_SWIZZLE_ZERO ? swz_b : PIPE_SWIZZLE_BLUE,
- swz_a < PIPE_SWIZZLE_ZERO ? swz_a : PIPE_SWIZZLE_ALPHA);
+ swz_r < PIPE_SWIZZLE_0 ? swz_r : PIPE_SWIZZLE_X,
+ swz_g < PIPE_SWIZZLE_0 ? swz_g : PIPE_SWIZZLE_Y,
+ swz_b < PIPE_SWIZZLE_0 ? swz_b : PIPE_SWIZZLE_Z,
+ swz_a < PIPE_SWIZZLE_0 ? swz_a : PIPE_SWIZZLE_W);
/* MOV dst, color(tmp).<swizzle> */
emit_instruction_op1(emit, VGPU10_OPCODE_MOV,
swz->inst_dst, &src_swizzled, FALSE);
/* handle swizzle zero terms */
- writemask_0 = (((swz_r == PIPE_SWIZZLE_ZERO) << 0) |
- ((swz_g == PIPE_SWIZZLE_ZERO) << 1) |
- ((swz_b == PIPE_SWIZZLE_ZERO) << 2) |
- ((swz_a == PIPE_SWIZZLE_ZERO) << 3));
+ writemask_0 = (((swz_r == PIPE_SWIZZLE_0) << 0) |
+ ((swz_g == PIPE_SWIZZLE_0) << 1) |
+ ((swz_b == PIPE_SWIZZLE_0) << 2) |
+ ((swz_a == PIPE_SWIZZLE_0) << 3));
if (writemask_0) {
struct tgsi_full_src_register zero = int_tex ?
}
/* handle swizzle one terms */
- writemask_1 = (((swz_r == PIPE_SWIZZLE_ONE) << 0) |
- ((swz_g == PIPE_SWIZZLE_ONE) << 1) |
- ((swz_b == PIPE_SWIZZLE_ONE) << 2) |
- ((swz_a == PIPE_SWIZZLE_ONE) << 3));
+ writemask_1 = (((swz_r == PIPE_SWIZZLE_1) << 0) |
+ ((swz_g == PIPE_SWIZZLE_1) << 1) |
+ ((swz_b == PIPE_SWIZZLE_1) << 2) |
+ ((swz_a == PIPE_SWIZZLE_1) << 3));
if (writemask_1) {
struct tgsi_full_src_register one = int_tex ?
boolean valid = TRUE;
if (tgsi_is_shadow_target(target) &&
- is_integer_type(emit->key.tex[unit].return_type)) {
+ is_integer_type(emit->sampler_return_type[unit])) {
debug_printf("Invalid SAMPLE_C with an integer texture!\n");
valid = FALSE;
}
const struct tgsi_full_instruction *inst)
{
const uint unit = inst->Src[1].Register.Index;
- const unsigned msaa = emit->key.tex[unit].texture_msaa;
+ const boolean msaa = tgsi_is_msaa_target(inst->Texture.Texture);
int offsets[3];
struct tex_swizzle_info swz_info;
{
const uint unit = inst->Src[1].Register.Index;
- if (emit->key.tex[unit].texture_target == PIPE_BUFFER) {
+ if (emit->sampler_target[unit] == TGSI_TEXTURE_BUFFER) {
/* RESINFO does not support querying texture buffers, so we instead
* store texture buffer sizes in shader constants, then copy them to
* implement TXQ instead of emitting RESINFO.
}
+/**
+ * We only special case the MOV instruction to try to detect constant
+ * color writes in the fragment shader.
+ */
+static boolean
+emit_mov(struct svga_shader_emitter_v10 *emit,
+ const struct tgsi_full_instruction *inst)
+{
+ const struct tgsi_full_src_register *src = &inst->Src[0];
+ const struct tgsi_full_dst_register *dst = &inst->Dst[0];
+
+ if (emit->unit == PIPE_SHADER_FRAGMENT &&
+ dst->Register.File == TGSI_FILE_OUTPUT &&
+ dst->Register.Index == 0 &&
+ src->Register.File == TGSI_FILE_CONSTANT &&
+ !src->Register.Indirect) {
+ emit->constant_color_output = TRUE;
+ }
+
+ return emit_simple(emit, inst);
+}
+
+
/**
* Emit a simple VGPU10 instruction which writes to multiple dest registers,
* where TGSI only uses one dest register.
case TGSI_OPCODE_MAD:
case TGSI_OPCODE_MAX:
case TGSI_OPCODE_MIN:
- case TGSI_OPCODE_MOV:
case TGSI_OPCODE_MUL:
case TGSI_OPCODE_NOP:
case TGSI_OPCODE_NOT:
/* simple instructions */
return emit_simple(emit, inst);
-
+ case TGSI_OPCODE_MOV:
+ return emit_mov(emit, inst);
case TGSI_OPCODE_EMIT:
return emit_vertex(emit, inst);
case TGSI_OPCODE_ENDPRIM:
return emit_endprim(emit, inst);
- case TGSI_OPCODE_ABS:
- return emit_abs(emit, inst);
case TGSI_OPCODE_IABS:
return emit_iabs(emit, inst);
case TGSI_OPCODE_ARL:
return emit_ssg(emit, inst);
case TGSI_OPCODE_ISSG:
return emit_issg(emit, inst);
- case TGSI_OPCODE_SUB:
- return emit_sub(emit, inst);
case TGSI_OPCODE_TEX:
return emit_tex(emit, inst);
case TGSI_OPCODE_TXP:
while (adjust_mask) {
unsigned index = u_bit_scan(&adjust_mask);
+
+ /* skip the instruction if this vertex attribute is not being used */
+ if (emit->info.input_usage_mask[index] == 0)
+ continue;
+
unsigned tmp = emit->vs.adjusted_input[index];
struct tgsi_full_src_register input_src =
make_src_reg(TGSI_FILE_INPUT, index);
alloc_immediate_int4(emit, 22, 30, 0, 0);
}
- assert(n <= Elements(emit->common_immediate_pos));
+ assert(n <= ARRAY_SIZE(emit->common_immediate_pos));
emit->num_common_immediates = n;
}
emit_src_register(emit, &tmp_src_x);
end_emit_instruction(emit);
- /* If we don't need to broadcast the color below, emit final color here */
- if (emit->key.fs.write_color0_to_n_cbufs <= 1) {
+ /* If we don't need to broadcast the color below or set fragments to
+ * white, emit final color here.
+ */
+ if (emit->key.fs.write_color0_to_n_cbufs <= 1 &&
+ !emit->key.fs.white_fragments) {
/* MOV output.color, tempcolor */
emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &color_dst,
&color_src, FALSE); /* XXX saturate? */
}
+/**
+ * When we need to emit white for all fragments (for emulating XOR logicop
+ * mode), this function copies white into the temporary color output register.
+ */
+static void
+emit_set_color_white(struct svga_shader_emitter_v10 *emit,
+ unsigned fs_color_tmp_index)
+{
+ struct tgsi_full_dst_register color_dst =
+ make_dst_temp_reg(fs_color_tmp_index);
+ struct tgsi_full_src_register white =
+ make_immediate_reg_float(emit, 1.0f);
+
+ emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &color_dst, &white, FALSE);
+}
+
+
/**
* Emit instructions for writing a single color output to multiple
* color buffers.
- * This is used when the TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
+ * This is used when the TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS (or
+ * when key.fs.white_fragments is true).
* property is set and the number of render targets is greater than one.
* \param fs_color_tmp_index index of the temp register that holds the
* color to broadcast.
make_src_temp_reg(fs_color_tmp_index);
assert(emit->unit == PIPE_SHADER_FRAGMENT);
- assert(n > 1);
for (i = 0; i < n; i++) {
unsigned output_reg = emit->fs.color_out_index[i];
if (emit->key.fs.alpha_func != SVGA3D_CMP_ALWAYS) {
emit_alpha_test_instructions(emit, fs_color_tmp_index);
}
- if (emit->key.fs.write_color0_to_n_cbufs > 1) {
+ if (emit->key.fs.white_fragments) {
+ emit_set_color_white(emit, fs_color_tmp_index);
+ }
+ if (emit->key.fs.write_color0_to_n_cbufs > 1 ||
+ emit->key.fs.white_fragments) {
emit_broadcast_color_instructions(emit, fs_color_tmp_index);
}
}
tgsi_dump(tokens,0);
}
- new_tokens = util_pstipple_create_fragment_shader(tokens, &unit, 0);
+ new_tokens = util_pstipple_create_fragment_shader(tokens, &unit, 0,
+ TGSI_FILE_INPUT);
emit->fs.pstipple_sampler_unit = unit;
/* Setup texture state for stipple */
- emit->key.tex[unit].texture_target = PIPE_TEXTURE_2D;
+ emit->sampler_target[unit] = TGSI_TEXTURE_2D;
emit->key.tex[unit].swizzle_r = TGSI_SWIZZLE_X;
emit->key.tex[unit].swizzle_g = TGSI_SWIZZLE_Y;
emit->key.tex[unit].swizzle_b = TGSI_SWIZZLE_Z;
/* These two flags cannot be used together */
assert(key->vs.need_prescale + key->vs.undo_viewport <= 1);
+ SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_TGSIVGPU10TRANSLATE);
/*
* Setup the code emitter
*/
emit = alloc_emitter();
if (!emit)
- return NULL;
+ goto done;
emit->unit = unit;
emit->key = *key;
/*
* Create, initialize the 'variant' object.
*/
- variant = CALLOC_STRUCT(svga_shader_variant);
+ variant = svga_new_shader_variant(svga);
if (!variant)
goto cleanup;
variant->pstipple_sampler_unit = emit->fs.pstipple_sampler_unit;
+ /* If there was exactly one write to a fragment shader output register
+ * and it came from a constant buffer, we know all fragments will have
+ * the same color (except for blending).
+ */
+ variant->constant_color_output =
+ emit->constant_color_output && emit->num_output_writes == 1;
+
/** keep track in the variant if flat interpolation is used
* for any of the varyings.
*/
cleanup:
free_emitter(emit);
+done:
+ SVGA_STATS_TIME_POP(svga_sws(svga));
return variant;
}
projects / mesa.git / blobdiff