#define VERTEX_CLIPCULL_DIST_LO_SLOT 35 // VS writes lower 4 clip/cull dist
#define VERTEX_CLIPCULL_DIST_HI_SLOT 36 // VS writes upper 4 clip/cull dist
#define VERTEX_POINT_SIZE_SLOT 37 // VS writes point size here
-static_assert(VERTEX_POINT_SIZE_SLOT < KNOB_NUM_ATTRIBUTES, "Mismatched attribute slot size");
-
+#define VERTEX_VIEWPORT_ARRAY_INDEX_SLOT 38
// SoAoSoA
struct simdvertex
{
uint32_t primID; // IN: primitive ID
uint32_t sampleIndex; // IN: sampleIndex
+ uint32_t rasterizerSampleCount; // IN: sample count used by the rasterizer
+
};
//////////////////////////////////////////////////////////////////////////
uint32_t lod; // for render targets, the lod being rendered to
uint32_t arrayIndex; // for render targets, the array index being rendered to for arrayed surfaces
SWR_TILE_MODE tileMode; // @llvm_enum
- bool bInterleavedSamples; // are MSAA samples stored interleaved or planar
uint32_t halign;
uint32_t valign;
uint32_t xOffset;
uint32_t lodOffsets[2][15]; // lod offsets for sampled surfaces
uint8_t *pAuxBaseAddress; // Used for compression, append/consume counter, etc.
+
+ bool bInterleavedSamples; // are MSAA samples stored interleaved or planar
};
// vertex fetch state
/// @brief All statistics generated by SWR go here. These are public
/// to driver.
/////////////////////////////////////////////////////////////////////////
-struct SWR_STATS
+OSALIGNLINE(struct) SWR_STATS
{
// Occlusion Query
uint64_t DepthPassCount; // Number of passing depth tests. Not exact.
// Pipeline Stats
+ uint64_t PsInvocations; // Number of Pixel Shader invocations
+ uint64_t CsInvocations; // Number of Compute Shader invocations
+
+};
+
+//////////////////////////////////////////////////////////////////////////
+/// SWR_STATS
+///
+/// @brief All statistics generated by FE.
+/////////////////////////////////////////////////////////////////////////
+OSALIGNLINE(struct) SWR_STATS_FE
+{
uint64_t IaVertices; // Number of Fetch Shader vertices
uint64_t IaPrimitives; // Number of PA primitives.
uint64_t VsInvocations; // Number of Vertex Shader invocations
uint64_t HsInvocations; // Number of Hull Shader invocations
uint64_t DsInvocations; // Number of Domain Shader invocations
uint64_t GsInvocations; // Number of Geometry Shader invocations
- uint64_t PsInvocations; // Number of Pixel Shader invocations
- uint64_t CsInvocations; // Number of Compute Shader invocations
+ uint64_t GsPrimitives; // Number of prims GS outputs.
uint64_t CInvocations; // Number of clipper invocations
uint64_t CPrimitives; // Number of clipper primitives.
- uint64_t GsPrimitives; // Number of prims GS outputs.
// Streamout Stats
- uint32_t SoWriteOffset[4];
uint64_t SoPrimStorageNeeded[4];
uint64_t SoNumPrimsWritten[4];
};
/////////////////////////////////////////////////////////////////////////
#define MAX_SO_STREAMS 4
+#define MAX_SO_BUFFERS 4
#define MAX_ATTRIBUTES 32
struct SWR_STREAMOUT_BUFFER
{
bool enable;
+ bool soWriteEnable;
// Pointers to streamout buffers.
uint32_t* pBuffer;
// The stream masks specify which attributes are sent to which streams.
// These masks help the FE to setup the pPrimData buffer that is passed
- // the the Stream Output Shader (SOS) function.
+ // the Stream Output Shader (SOS) function.
uint32_t streamMasks[MAX_SO_STREAMS];
// Number of attributes, including position, per vertex that are streamed out.
// geometry shader emits PrimitiveID
bool emitsPrimitiveID;
+ // geometry shader emits ViewportArrayIndex
+ bool emitsViewportArrayIndex;
+
// if true, geometry shader emits a single stream, with separate cut buffer.
// if false, geometry shader emits vertices for multiple streams to the stream buffer, with a separate StreamID buffer
// to map vertices to streams
SWR_MULTISAMPLE_4X,
SWR_MULTISAMPLE_8X,
SWR_MULTISAMPLE_16X,
- SWR_MULTISAMPLE_TYPE_MAX
+ SWR_MULTISAMPLE_TYPE_COUNT
};
struct SWR_BLEND_STATE
typedef void(__cdecl *PFN_PIXEL_KERNEL)(HANDLE hPrivateData, SWR_PS_CONTEXT *pContext);
typedef void(__cdecl *PFN_CPIXEL_KERNEL)(HANDLE hPrivateData, SWR_PS_CONTEXT *pContext);
typedef void(__cdecl *PFN_BLEND_JIT_FUNC)(const SWR_BLEND_STATE*, simdvector&, simdvector&, uint32_t, uint8_t*, simdvector&, simdscalari*, simdscalari*);
+typedef simdscalar(*PFN_QUANTIZE_DEPTH)(simdscalar);
//////////////////////////////////////////////////////////////////////////
/// FRONTEND_STATE
// skip clip test, perspective divide, and viewport transform
// intended for verts in screen space
bool vpTransformDisable;
+ bool bEnableCutIndex;
union
{
struct
uint32_t triStripList : 2;
};
uint32_t bits;
- }provokingVertex;
+ } provokingVertex;
uint32_t topologyProvokingVertex; // provoking vertex for the draw topology
};
float m32;
};
+//////////////////////////////////////////////////////////////////////////
+/// VIEWPORT_MATRIXES
+/////////////////////////////////////////////////////////////////////////
+struct SWR_VIEWPORT_MATRICES
+{
+ float m00[KNOB_NUM_VIEWPORTS_SCISSORS];
+ float m11[KNOB_NUM_VIEWPORTS_SCISSORS];
+ float m22[KNOB_NUM_VIEWPORTS_SCISSORS];
+ float m30[KNOB_NUM_VIEWPORTS_SCISSORS];
+ float m31[KNOB_NUM_VIEWPORTS_SCISSORS];
+ float m32[KNOB_NUM_VIEWPORTS_SCISSORS];
+};
+
//////////////////////////////////////////////////////////////////////////
/// SWR_VIEWPORT
/////////////////////////////////////////////////////////////////////////
{
SWR_MSAA_CENTER_PATTERN,
SWR_MSAA_STANDARD_PATTERN,
- SWR_MSAA_SAMPLE_PATTERN_MAX
+ SWR_MSAA_SAMPLE_PATTERN_COUNT
};
enum SWR_PIXEL_LOCATION
//////////////////////////////////////////////////////////////////////////
struct SWR_RASTSTATE
{
- uint32_t cullMode : 2;
- uint32_t fillMode : 2;
- uint32_t frontWinding : 1;
- uint32_t scissorEnable : 1;
- uint32_t depthClipEnable : 1;
+ uint32_t cullMode : 2;
+ uint32_t fillMode : 2;
+ uint32_t frontWinding : 1;
+ uint32_t scissorEnable : 1;
+ uint32_t depthClipEnable : 1;
+ uint32_t pointParam : 1;
+ uint32_t pointSpriteEnable : 1;
+ uint32_t pointSpriteTopOrigin : 1;
+ uint32_t msaaRastEnable : 1;
+ uint32_t forcedSampleCount : 1;
+ uint32_t pixelOffset : 1;
+ uint32_t depthBiasPreAdjusted : 1; ///< depth bias constant is in float units, not per-format Z units
+ uint32_t conservativeRast : 1;
+
float pointSize;
float lineWidth;
- // point size output from the VS
- bool pointParam;
-
- // point sprite
- bool pointSpriteEnable;
- bool pointSpriteTopOrigin;
-
- // depth bias
float depthBias;
float slopeScaledDepthBias;
float depthBiasClamp;
///@todo: MSAA lines
// multisample state for MSAA lines
- bool msaaRastEnable;
SWR_MSAA_RASTMODE rastMode; // @llvm_enum
// sample count the rasterizer is running at
SWR_MULTISAMPLE_COUNT sampleCount; // @llvm_enum
- bool bForcedSampleCount;
uint32_t pixelLocation; // UL or Center
- bool pixelOffset; // offset pixel positions by .5 in both the horizontal and vertical direction
SWR_MULTISAMPLE_POS iSamplePos[SWR_MAX_NUM_MULTISAMPLES];
SWR_MSAA_SAMPLE_PATTERN samplePattern; // @llvm_enum
uint8_t clipDistanceMask;
};
+enum SWR_CONSTANT_SOURCE
+{
+ SWR_CONSTANT_SOURCE_CONST_0000,
+ SWR_CONSTANT_SOURCE_CONST_0001_FLOAT,
+ SWR_CONSTANT_SOURCE_CONST_1111_FLOAT,
+ SWR_CONSTANT_SOURCE_PRIM_ID
+};
+
+struct SWR_ATTRIB_SWIZZLE
+{
+ uint16_t sourceAttrib : 5; // source attribute
+ uint16_t constantSource : 2; // constant source to apply
+ uint16_t componentOverrideMask : 4; // override component with constant source
+};
+
// backend state
struct SWR_BACKEND_STATE
{
- uint32_t constantInterpolationMask;
- uint32_t pointSpriteTexCoordMask;
- uint8_t numAttributes;
- uint8_t numComponents[KNOB_NUM_ATTRIBUTES];
+ uint32_t constantInterpolationMask; // bitmask indicating which attributes have constant interpolation
+ uint32_t pointSpriteTexCoordMask; // bitmask indicating the attribute(s) which should be interpreted as tex coordinates
+
+ uint8_t numAttributes; // total number of attributes to send to backend (up to 32)
+ uint8_t numComponents[32]; // number of components to setup per attribute, this reduces some calculations for unneeded components
+
+ bool swizzleEnable; // when enabled, core will parse the swizzle map when
+ // setting up attributes for the backend, otherwise
+ // all attributes up to numAttributes will be sent
+ SWR_ATTRIB_SWIZZLE swizzleMap[32];
};
{
SWR_SHADING_RATE_PIXEL,
SWR_SHADING_RATE_SAMPLE,
- SWR_SHADING_RATE_MAX,
+ SWR_SHADING_RATE_COUNT,
};
enum SWR_INPUT_COVERAGE
{
SWR_INPUT_COVERAGE_NONE,
SWR_INPUT_COVERAGE_NORMAL,
- SWR_INPUT_COVERAGE_MAX,
+ SWR_INPUT_COVERAGE_INNER_CONSERVATIVE,
+ SWR_INPUT_COVERAGE_COUNT,
};
enum SWR_PS_POSITION_OFFSET
SWR_PS_POSITION_SAMPLE_NONE,
SWR_PS_POSITION_SAMPLE_OFFSET,
SWR_PS_POSITION_CENTROID_OFFSET,
- SWR_PS_POSITION_OFFSET_MAX,
+ SWR_PS_POSITION_OFFSET_COUNT,
};
enum SWR_BARYCENTRICS_MASK
SWR_BARYCENTRIC_PER_PIXEL_MASK = 0x1,
SWR_BARYCENTRIC_CENTROID_MASK = 0x2,
SWR_BARYCENTRIC_PER_SAMPLE_MASK = 0x4,
- SWR_BARYCENTRICS_MASK_MAX = 0x8
};
// pixel shader state
// dword 2
uint32_t killsPixel : 1; // pixel shader can kill pixels
- uint32_t inputCoverage : 1; // type of input coverage PS uses
+ uint32_t inputCoverage : 2; // ps uses input coverage
uint32_t writesODepth : 1; // pixel shader writes to depth
uint32_t usesSourceDepth : 1; // pixel shader reads depth
uint32_t shadingRate : 2; // shading per pixel / sample / coarse pixel
uint32_t forceEarlyZ : 1; // force execution of early depth/stencil test
};
+
+// depth bounds state
+struct SWR_DEPTH_BOUNDS_STATE
+{
+ bool depthBoundsTestEnable;
+ float depthBoundsTestMinValue;
+ float depthBoundsTestMaxValue;
+};
+
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