radeonsi/gfx10: consolidate & improve input_prim determination for NGG

[mesa.git] / src / gallium / drivers / swr / swr_fence.cpp

diff --git a/src/gallium/drivers/swr/swr_fence.cpp b/src/gallium/drivers/swr/swr_fence.cpp
index 3005eb9aaadd61dd82b92f2ea182d9cebae9273a..074d82a3b47a5e37d3dd40b58b8156df554164d4 100644 (file)
--- a/src/gallium/drivers/swr/swr_fence.cpp
+++ b/src/gallium/drivers/swr/swr_fence.cpp
@@ -29,6 +29,10 @@
 #include "swr_screen.h"
 #include "swr_fence.h"
 
+#ifdef __APPLE__
+#include <sched.h>
+#endif
+
 #if defined(PIPE_CC_MSVC) // portable thread yield
    #define sched_yield SwitchToThread
 #endif
@@ -46,7 +50,9 @@ swr_fence_cb(uint64_t userData, uint64_t userData2, uint64_t userData3)
    swr_fence_do_work(fence);
 
    /* Correct value is in SwrSync data, and not the fence write field. */
-   fence->read = userData2;
+   /* Contexts may not finish in order, but fence value always increases */
+   if (fence->read < userData2)
+      fence->read = userData2;
 }
 
 /*