swr/rast: make simd16 logicops avx512f safe

[mesa.git] / src / gallium / drivers / swr / swr_state.h

diff --git a/src/gallium/drivers/swr/swr_state.h b/src/gallium/drivers/swr/swr_state.h
index 0e3b49d2b0d330476e85349d246e30d598aa33dd..7940a960d93085200e4cae175872bcd40983b09d 100644 (file)
--- a/src/gallium/drivers/swr/swr_state.h
+++ b/src/gallium/drivers/swr/swr_state.h
@@ -30,7 +30,7 @@
 #include "tgsi/tgsi_dump.h"
 #include "gallivm/lp_bld_init.h"
 #include "gallivm/lp_bld_tgsi.h"
-#include "util/u_hash.h"
+#include "util/crc32.h"
 #include "api.h"
 #include "swr_tex_sample.h"
 #include "swr_shader.h"
@@ -48,6 +48,7 @@ struct ShaderVariant {
 
 typedef ShaderVariant<PFN_VERTEX_FUNC> VariantVS;
 typedef ShaderVariant<PFN_PIXEL_KERNEL> VariantFS;
+typedef ShaderVariant<PFN_GS_FUNC> VariantGS;
 
 /* skeleton */
 struct swr_vertex_shader {
@@ -67,11 +68,22 @@ struct swr_fragment_shader {
    std::unordered_map<swr_jit_fs_key, std::unique_ptr<VariantFS>> map;
 };
 
+struct swr_geometry_shader {
+   struct pipe_shader_state pipe;
+   struct lp_tgsi_info info;
+   SWR_GS_STATE gsState;
+
+   std::unordered_map<swr_jit_gs_key, std::unique_ptr<VariantGS>> map;
+};
+
 /* Vertex element state */
 struct swr_vertex_element_state {
    FETCH_COMPILE_STATE fsState;
-   PFN_FETCH_FUNC fsFunc;
-   uint32_t stream_pitch[PIPE_MAX_ATTRIBS];
+   PFN_FETCH_FUNC fsFunc {NULL};
+   uint32_t stream_pitch[PIPE_MAX_ATTRIBS] {0};
+   uint32_t min_instance_div[PIPE_MAX_ATTRIBS] {0};
+   uint32_t instanced_bufs {0};
+   std::unordered_map<swr_jit_fetch_key, PFN_FETCH_FUNC> map;
 };
 
 struct swr_blend_state {
@@ -80,6 +92,11 @@ struct swr_blend_state {
    RENDER_TARGET_BLEND_COMPILE_STATE compileState[PIPE_MAX_COLOR_BUFS];
 };
 
+struct swr_poly_stipple {
+   struct pipe_poly_stipple pipe;
+   bool prim_is_poly;
+};
+
 /*
  * Derived SWR API DrawState
  * For convenience of making simple changes without re-deriving state.
@@ -106,7 +123,7 @@ swr_convert_logic_op(const UINT op)
    case PIPE_LOGICOP_NOR:
       return LOGICOP_NOR;
    case PIPE_LOGICOP_AND_INVERTED:
-      return LOGICOP_CLEAR;
+      return LOGICOP_AND_INVERTED;
    case PIPE_LOGICOP_COPY_INVERTED:
       return LOGICOP_COPY_INVERTED;
    case PIPE_LOGICOP_AND_REVERSE:
@@ -318,4 +335,65 @@ swr_convert_target_type(const enum pipe_texture_target target)
       return SURFACE_NULL;
    }
 }
+
+/*
+ * Convert mesa PIPE_PRIM_X to SWR enum PRIMITIVE_TOPOLOGY
+ */
+static INLINE enum PRIMITIVE_TOPOLOGY
+swr_convert_prim_topology(const unsigned mode)
+{
+   switch (mode) {
+   case PIPE_PRIM_POINTS:
+      return TOP_POINT_LIST;
+   case PIPE_PRIM_LINES:
+      return TOP_LINE_LIST;
+   case PIPE_PRIM_LINE_LOOP:
+      return TOP_LINE_LOOP;
+   case PIPE_PRIM_LINE_STRIP:
+      return TOP_LINE_STRIP;
+   case PIPE_PRIM_TRIANGLES:
+      return TOP_TRIANGLE_LIST;
+   case PIPE_PRIM_TRIANGLE_STRIP:
+      return TOP_TRIANGLE_STRIP;
+   case PIPE_PRIM_TRIANGLE_FAN:
+      return TOP_TRIANGLE_FAN;
+   case PIPE_PRIM_QUADS:
+      return TOP_QUAD_LIST;
+   case PIPE_PRIM_QUAD_STRIP:
+      return TOP_QUAD_STRIP;
+   case PIPE_PRIM_POLYGON:
+      return TOP_TRIANGLE_FAN; /* XXX TOP_POLYGON; */
+   case PIPE_PRIM_LINES_ADJACENCY:
+      return TOP_LINE_LIST_ADJ;
+   case PIPE_PRIM_LINE_STRIP_ADJACENCY:
+      return TOP_LISTSTRIP_ADJ;
+   case PIPE_PRIM_TRIANGLES_ADJACENCY:
+      return TOP_TRI_LIST_ADJ;
+   case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY:
+      return TOP_TRI_STRIP_ADJ;
+   default:
+      assert(0 && "Unknown topology");
+      return TOP_UNKNOWN;
+   }
+};
+
+/*
+ * convert mesa PIPE_POLYGON_MODE_X to SWR enum SWR_FILLMODE
+ */
+static INLINE enum SWR_FILLMODE
+swr_convert_fill_mode(const unsigned mode)
+{
+   switch(mode) {
+   case PIPE_POLYGON_MODE_FILL:
+      return SWR_FILLMODE_SOLID;
+   case PIPE_POLYGON_MODE_LINE:
+      return SWR_FILLMODE_WIREFRAME;
+   case PIPE_POLYGON_MODE_POINT:
+      return SWR_FILLMODE_POINT;
+   default:
+      assert(0 && "Unknown fillmode");
+      return SWR_FILLMODE_SOLID; // at least do something sensible
+   }
+}
+
 #endif