exec->ct0ca = exec->exec_bo->paddr + bin_offset;
+ exec->bin_u = bin;
+
exec->shader_rec_v = exec->exec_bo->vaddr + shader_rec_offset;
exec->shader_rec_p = exec->exec_bo->paddr + shader_rec_offset;
exec->shader_rec_size = args->shader_rec_size;
int
vc4_cl_validate(struct drm_device *dev, struct vc4_exec_info *exec)
{
+ struct drm_vc4_submit_cl *args = exec->args;
int ret = 0;
+ if (args->color_write.bits & VC4_RENDER_CONFIG_MS_MODE_4X) {
+ exec->tile_width = 32;
+ exec->tile_height = 32;
+ } else {
+ exec->tile_width = 64;
+ exec->tile_height = 64;
+ }
+
if (exec->args->bin_cl_size != 0) {
ret = vc4_get_bcl(dev, exec);
if (ret)