radeonsi: use a compiler queue with a low priority for optimized shaders

[mesa.git] / src / gallium / drivers / vc4 / vc4_blit.c

diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c
index ee08ab8c0f30b1dc5e664f5c5eb6237036aab6d4..1e056568acb6bc2edd6ad4841447b2fb20a4499c 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -51,9 +51,6 @@ static bool
 vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
 {
         struct vc4_context *vc4 = vc4_context(pctx);
-        bool old_msaa = vc4->msaa;
-        int old_tile_width = vc4->tile_width;
-        int old_tile_height = vc4->tile_height;
         bool msaa = (info->src.resource->nr_samples > 1 ||
                      info->dst.resource->nr_samples > 1);
         int tile_width = msaa ? 32 : 64;
@@ -114,8 +111,6 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
         if (info->dst.resource->format != info->src.resource->format)
                 return false;
 
-        vc4_flush(pctx);
-
         if (false) {
                 fprintf(stderr, "RCL blit from %d,%d to %d,%d (%d,%d)\n",
                         info->src.box.x,
@@ -131,29 +126,34 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
         struct pipe_surface *src_surf =
                 vc4_get_blit_surface(pctx, info->src.resource, info->src.level);
 
-        pipe_surface_reference(&vc4->color_read, src_surf);
-        if (dst_surf->texture->nr_samples > 1)
-                pipe_surface_reference(&vc4->color_write, dst_surf);
-        else
-                pipe_surface_reference(&vc4->msaa_color_write, dst_surf);
+        vc4_flush_jobs_reading_resource(vc4, info->src.resource);
+
+        struct vc4_job *job = vc4_get_job(vc4, dst_surf, NULL);
+        pipe_surface_reference(&job->color_read, src_surf);
 
-        vc4->draw_min_x = info->dst.box.x;
-        vc4->draw_min_y = info->dst.box.y;
-        vc4->draw_max_x = info->dst.box.x + info->dst.box.width;
-        vc4->draw_max_y = info->dst.box.y + info->dst.box.height;
-        vc4->draw_width = dst_surf->width;
-        vc4->draw_height = dst_surf->height;
+        /* If we're resolving from MSAA to single sample, we still need to run
+         * the engine in MSAA mode for the load.
+         */
+        if (!job->msaa && info->src.resource->nr_samples > 1) {
+                job->msaa = true;
+                job->tile_width = 32;
+                job->tile_height = 32;
+        }
 
-        vc4->tile_width = tile_width;
-        vc4->tile_height = tile_height;
-        vc4->msaa = msaa;
-        vc4->needs_flush = true;
+        job->draw_min_x = info->dst.box.x;
+        job->draw_min_y = info->dst.box.y;
+        job->draw_max_x = info->dst.box.x + info->dst.box.width;
+        job->draw_max_y = info->dst.box.y + info->dst.box.height;
+        job->draw_width = dst_surf->width;
+        job->draw_height = dst_surf->height;
 
-        vc4_job_submit(vc4);
+        job->tile_width = tile_width;
+        job->tile_height = tile_height;
+        job->msaa = msaa;
+        job->needs_flush = true;
+        job->resolve |= PIPE_CLEAR_COLOR;
 
-        vc4->msaa = old_msaa;
-        vc4->tile_width = old_tile_width;
-        vc4->tile_height = old_tile_height;
+        vc4_job_submit(vc4, job);
 
         pipe_surface_reference(&dst_surf, NULL);
         pipe_surface_reference(&src_surf, NULL);