#define VC4_DIRTY_CLIP (1 << 20)
#define VC4_DIRTY_UNCOMPILED_VS (1 << 21)
#define VC4_DIRTY_UNCOMPILED_FS (1 << 22)
-#define VC4_DIRTY_COMPILED_FS (1 << 24)
+#define VC4_DIRTY_COMPILED_CS (1 << 23)
+#define VC4_DIRTY_COMPILED_VS (1 << 24)
+#define VC4_DIRTY_COMPILED_FS (1 << 25)
+
+struct vc4_sampler_view {
+ struct pipe_sampler_view base;
+ uint32_t texture_p0;
+ uint32_t texture_p1;
+};
+
+struct vc4_sampler_state {
+ struct pipe_sampler_state base;
+ uint32_t texture_p1;
+};
struct vc4_texture_stateobj {
struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
/** How many variants of this program were compiled, for shader-db. */
uint32_t compiled_variant_count;
struct pipe_shader_state base;
- const struct tgsi_token *twoside_tokens;
};
struct vc4_ubo_range {
struct vc4_ubo_range *ubo_ranges;
uint32_t num_ubo_ranges;
uint32_t ubo_size;
+ /**
+ * VC4_DIRTY_* flags that, when set in vc4->dirty, mean that the
+ * uniforms have to be rewritten (and therefore the shader state
+ * reemitted).
+ */
+ uint32_t uniform_dirty_bits;
/** bitmask of which inputs are color inputs, for flat shade handling. */
uint32_t color_inputs;
* It doesn't include those that aren't part of the VPM, like
* point/line coordinates.
*/
- struct vc4_varying_semantic *input_semantics;
+ struct vc4_varying_slot *input_slots;
};
struct vc4_program_stateobj {
struct vc4_uncompiled_shader *bind_vs, *bind_fs;
struct vc4_compiled_shader *cs, *vs, *fs;
uint8_t num_exports;
- /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
- * for TGSI_SEMANTIC_GENERIC. Special vs exports (position and point-
- * size) are not included in this
+ /* Indexed by slot. Special vs exports (position and pointsize) are
+ * not included in this
*/
- uint8_t export_linkage[63];
+ uint8_t export_linkage[VARYING_SLOT_VAR0 + 8];
};
struct vc4_constbuf_stateobj {
struct vc4_screen *screen;
struct vc4_cl bcl;
- struct vc4_cl rcl;
struct vc4_cl shader_rec;
struct vc4_cl uniforms;
struct vc4_cl bo_handles;
struct vc4_cl bo_pointers;
uint32_t shader_rec_count;
+
+ /** @{ Surfaces to submit rendering for. */
+ struct pipe_surface *color_read;
+ struct pipe_surface *color_write;
+ struct pipe_surface *zs_read;
+ struct pipe_surface *zs_write;
+ struct pipe_surface *msaa_color_write;
+ struct pipe_surface *msaa_zs_write;
+ /** @} */
/** @{
* Bounding box of the scissor across all queued drawing.
*
uint32_t draw_max_x;
uint32_t draw_max_y;
/** @} */
+ /** @{
+ * Width/height of the color framebuffer being rendered to,
+ * for VC4_TILE_RENDERING_MODE_CONFIG.
+ */
+ uint32_t draw_width;
+ uint32_t draw_height;
+ /** @} */
+ /** @{ Tile information, depending on MSAA and float color buffer. */
+ uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
+ uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
- struct vc4_bo *tile_alloc;
- struct vc4_bo *tile_state;
+ uint32_t tile_width; /** @< Width of a tile. */
+ uint32_t tile_height; /** @< Height of a tile. */
+ /** Whether the current rendering is in a 4X MSAA tile buffer. */
+ bool msaa;
+ /** @} */
struct util_slab_mempool transfer_pool;
struct blitter_context *blitter;
bool needs_flush;
/**
- * Set when needs_flush, and the queued rendering is not just composed
- * of full-buffer clears.
+ * Number of draw calls (not counting full buffer clears) queued in
+ * the current job.
*/
- bool draw_call_queued;
+ uint32_t draw_calls_queued;
+
+ /** Maximum index buffer valid for the current shader_rec. */
+ uint32_t max_index;
+ /** Last index bias baked into the current shader_rec. */
+ uint32_t last_index_bias;
struct primconvert_context *primconvert;
struct ra_regs *regs;
unsigned int reg_class_any;
+ unsigned int reg_class_a_or_b_or_acc;
+ unsigned int reg_class_r4_or_a;
unsigned int reg_class_a;
uint8_t prim_mode;
struct vc4_vertex_stateobj *vtx;
- struct pipe_blend_color blend_color;
+ struct {
+ struct pipe_blend_color f;
+ uint8_t ub[4];
+ } blend_color;
struct pipe_stencil_ref stencil_ref;
unsigned sample_mask;
struct pipe_framebuffer_state framebuffer;
return (struct vc4_context *)pcontext;
}
+static inline struct vc4_sampler_view *
+vc4_sampler_view(struct pipe_sampler_view *psview)
+{
+ return (struct vc4_sampler_view *)psview;
+}
+
+static inline struct vc4_sampler_state *
+vc4_sampler_state(struct pipe_sampler_state *psampler)
+{
+ return (struct vc4_sampler_state *)psampler;
+}
+
struct pipe_context *vc4_context_create(struct pipe_screen *pscreen,
- void *priv);
+ void *priv, unsigned flags);
void vc4_draw_init(struct pipe_context *pctx);
void vc4_state_init(struct pipe_context *pctx);
void vc4_program_init(struct pipe_context *pctx);
int vc4_simulator_flush(struct vc4_context *vc4,
struct drm_vc4_submit_cl *args);
+void vc4_set_shader_uniform_dirty_flags(struct vc4_compiled_shader *shader);
void vc4_write_uniforms(struct vc4_context *vc4,
struct vc4_compiled_shader *shader,
struct vc4_constbuf_stateobj *cb,