vc4: Implement live intervals using a CFG.

[mesa.git] / src / gallium / drivers / vc4 / vc4_context.h

diff --git a/src/gallium/drivers/vc4/vc4_context.h b/src/gallium/drivers/vc4/vc4_context.h
index 7502293180a8f8f2f81c95e628f0465c1d659671..c271a957717458333dbb07c3246b9616640960d8 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -103,7 +103,6 @@ struct vc4_uncompiled_shader {
         /** How many variants of this program were compiled, for shader-db. */
         uint32_t compiled_variant_count;
         struct pipe_shader_state base;
-        const struct tgsi_token *twoside_tokens;
 };
 
 struct vc4_ubo_range {
@@ -164,11 +163,6 @@ struct vc4_compiled_shader {
 struct vc4_program_stateobj {
         struct vc4_uncompiled_shader *bind_vs, *bind_fs;
         struct vc4_compiled_shader *cs, *vs, *fs;
-        uint8_t num_exports;
-        /* Indexed by slot.  Special vs exports (position and pointsize) are
-         * not included in this
-         */
-        uint8_t export_linkage[VARYING_SLOT_VAR0 + 8];
 };
 
 struct vc4_constbuf_stateobj {
@@ -207,6 +201,8 @@ struct vc4_context {
         struct pipe_surface *color_write;
         struct pipe_surface *zs_read;
         struct pipe_surface *zs_write;
+        struct pipe_surface *msaa_color_write;
+        struct pipe_surface *msaa_zs_write;
         /** @} */
         /** @{
          * Bounding box of the scissor across all queued drawing.
@@ -225,6 +221,15 @@ struct vc4_context {
         uint32_t draw_width;
         uint32_t draw_height;
         /** @} */
+        /** @{ Tile information, depending on MSAA and float color buffer. */
+        uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
+        uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
+
+        uint32_t tile_width; /** @< Width of a tile. */
+        uint32_t tile_height; /** @< Height of a tile. */
+        /** Whether the current rendering is in a 4X MSAA tile buffer. */
+        bool msaa;
+       /** @} */
 
         struct util_slab_mempool transfer_pool;
         struct blitter_context *blitter;
@@ -251,10 +256,10 @@ struct vc4_context {
         bool needs_flush;
 
         /**
-         * Set when needs_flush, and the queued rendering is not just composed
-         * of full-buffer clears.
+         * Number of draw calls (not counting full buffer clears) queued in
+         * the current job.
          */
-        bool draw_call_queued;
+        uint32_t draw_calls_queued;
 
         /** Maximum index buffer valid for the current shader_rec. */
         uint32_t max_index;
@@ -292,7 +297,10 @@ struct vc4_context {
 
         struct vc4_vertex_stateobj *vtx;
 
-        struct pipe_blend_color blend_color;
+        struct {
+                struct pipe_blend_color f;
+                uint8_t ub[4];
+        } blend_color;
         struct pipe_stencil_ref stencil_ref;
         unsigned sample_mask;
         struct pipe_framebuffer_state framebuffer;
@@ -384,7 +392,8 @@ void vc4_flush(struct pipe_context *pctx);
 void vc4_job_init(struct vc4_context *vc4);
 void vc4_job_submit(struct vc4_context *vc4);
 void vc4_job_reset(struct vc4_context *vc4);
-bool vc4_cl_references_bo(struct pipe_context *pctx, struct vc4_bo *bo);
+bool vc4_cl_references_bo(struct pipe_context *pctx, struct vc4_bo *bo,
+                          bool include_reads);
 void vc4_emit_state(struct pipe_context *pctx);
 void vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c);
 struct qpu_reg *vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c);