vc4: Initialize undefined temporaries to 0.

[mesa.git] / src / gallium / drivers / vc4 / vc4_context.h

diff --git a/src/gallium/drivers/vc4/vc4_context.h b/src/gallium/drivers/vc4/vc4_context.h
index d63678713580c8578436ea8cb835e21aaa16aff4..e8f9e355a98098c1f81efcb9bbf2cab6059d4453 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -25,6 +25,8 @@
 #ifndef VC4_CONTEXT_H
 #define VC4_CONTEXT_H
 
+#include <stdio.h>
+
 #include "pipe/p_context.h"
 #include "pipe/p_state.h"
 #include "util/u_slab.h"
@@ -54,6 +56,7 @@
 #define VC4_DIRTY_VTXBUF        (1 << 15)
 #define VC4_DIRTY_INDEXBUF      (1 << 16)
 #define VC4_DIRTY_SCISSOR       (1 << 17)
+#define VC4_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
 
 #define VC4_SHADER_DIRTY_VP     (1 << 0)
 #define VC4_SHADER_DIRTY_FP     (1 << 1)
@@ -73,17 +76,26 @@ struct vc4_shader_uniform_info {
         uint32_t num_texture_samples;
 };
 
+struct vc4_uncompiled_shader {
+        struct pipe_shader_state base;
+        const struct tgsi_token *twoside_tokens;
+};
+
 struct vc4_compiled_shader {
         struct vc4_bo *bo;
 
         struct vc4_shader_uniform_info uniforms[2];
 
         uint32_t coord_shader_offset;
+
+        /** bitmask of which inputs are color inputs, for flat shade handling. */
+        uint32_t color_inputs;
+
         uint8_t num_inputs;
 };
 
 struct vc4_program_stateobj {
-        struct pipe_shader_state *bind_vs, *bind_fs;
+        struct vc4_uncompiled_shader *bind_vs, *bind_fs;
         struct vc4_compiled_shader *vs, *fs;
         uint32_t dirty;
         uint8_t num_exports;
@@ -143,6 +155,8 @@ struct vc4_context {
          */
         uint32_t resolve;
         uint32_t clear_color[2];
+        uint32_t clear_depth; /**< 24-bit unorm depth */
+        uint8_t clear_stencil;
 
         /**
          * Set if some drawing (triangles, blits, or just a glClear()) has
@@ -161,11 +175,15 @@ struct vc4_context {
 
         struct util_hash_table *fs_cache, *vs_cache;
 
+        struct ra_regs *regs;
+        unsigned int reg_class_any;
+        unsigned int reg_class_a;
+
         /** @{ Current pipeline state objects */
         struct pipe_scissor_state scissor;
         struct pipe_blend_state *blend;
         struct vc4_rasterizer_state *rasterizer;
-        struct pipe_depth_stencil_alpha_state *zsa;
+        struct vc4_depth_stencil_alpha_state *zsa;
 
         struct vc4_texture_stateobj verttex, fragtex;
 
@@ -192,6 +210,32 @@ struct vc4_rasterizer_state {
         uint8_t config_bits[3];
 
         float point_size;
+
+        /**
+         * Half-float (1/8/7 bits) value of polygon offset units for
+         * VC4_PACKET_DEPTH_OFFSET
+         */
+        uint16_t offset_units;
+        /**
+         * Half-float (1/8/7 bits) value of polygon offset scale for
+         * VC4_PACKET_DEPTH_OFFSET
+         */
+        uint16_t offset_factor;
+};
+
+struct vc4_depth_stencil_alpha_state {
+        struct pipe_depth_stencil_alpha_state base;
+
+        /* VC4_CONFIGURATION_BITS */
+        uint8_t config_bits[3];
+
+        /** Uniforms for stencil state.
+         *
+         * Index 0 is either the front config, or the front-and-back config.
+         * Index 1 is the back config if doing separate back stencil.
+         * Index 2 is the writemask config if it's not a common mask value.
+         */
+        uint32_t stencil_uniforms[3];
 };
 
 static inline struct vc4_context *
@@ -205,10 +249,10 @@ struct pipe_context *vc4_context_create(struct pipe_screen *pscreen,
 void vc4_draw_init(struct pipe_context *pctx);
 void vc4_state_init(struct pipe_context *pctx);
 void vc4_program_init(struct pipe_context *pctx);
+void vc4_query_init(struct pipe_context *pctx);
 void vc4_simulator_init(struct vc4_screen *screen);
 int vc4_simulator_flush(struct vc4_context *vc4,
-                        struct drm_vc4_submit_cl *args,
-                        struct vc4_surface *color_surf);
+                        struct drm_vc4_submit_cl *args);
 
 void vc4_write_uniforms(struct vc4_context *vc4,
                         struct vc4_compiled_shader *shader,
@@ -219,7 +263,14 @@ void vc4_write_uniforms(struct vc4_context *vc4,
 void vc4_flush(struct pipe_context *pctx);
 void vc4_flush_for_bo(struct pipe_context *pctx, struct vc4_bo *bo);
 void vc4_emit_state(struct pipe_context *pctx);
-void vc4_generate_code(struct qcompile *c);
-void vc4_update_compiled_shaders(struct vc4_context *vc4);
-
+void vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c);
+struct qpu_reg *vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c);
+void vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode);
+
+bool vc4_rt_format_supported(enum pipe_format f);
+bool vc4_rt_format_is_565(enum pipe_format f);
+bool vc4_tex_format_supported(enum pipe_format f);
+uint8_t vc4_get_tex_format(enum pipe_format f);
+const uint8_t *vc4_get_format_swizzle(enum pipe_format f);
+void vc4_init_query_functions(struct vc4_context *vc4);
 #endif /* VC4_CONTEXT_H */