#include "util/u_blitter.h"
#include "util/u_prim.h"
-#include "util/u_format.h"
+#include "util/format/u_format.h"
#include "util/u_pack_color.h"
+#include "util/u_split_draw.h"
#include "util/u_upload_mgr.h"
#include "indices/u_primconvert.h"
/* The SW-5891 workaround may cause us to emit multiple shader recs
* and draw packets.
*/
- int num_draws = DIV_ROUND_UP(vert_count, 65535) + 1;
+ int num_draws = DIV_ROUND_UP(vert_count, 65535 - 2) + 1;
/* Binner gets our packet state -- vc4_emit.c contents,
* and the primitive itself.
vc4_get_draw_cl_space(job, 0);
- struct vc4_cl_out *bcl = cl_start(&job->bcl);
- // Tile state data is 48 bytes per tile, I think it can be thrown away
- // as soon as binning is finished.
- cl_u8(&bcl, VC4_PACKET_TILE_BINNING_MODE_CONFIG);
- cl_u32(&bcl, 0); /* tile alloc addr, filled by kernel */
- cl_u32(&bcl, 0); /* tile alloc size, filled by kernel */
- cl_u32(&bcl, 0); /* tile state addr, filled by kernel */
- cl_u8(&bcl, job->draw_tiles_x);
- cl_u8(&bcl, job->draw_tiles_y);
- /* Other flags are filled by kernel. */
- cl_u8(&bcl, job->msaa ? VC4_BIN_CONFIG_MS_MODE_4X : 0);
+ cl_emit(&job->bcl, TILE_BINNING_MODE_CONFIGURATION, bin) {
+ bin.width_in_tiles = job->draw_tiles_x;
+ bin.height_in_tiles = job->draw_tiles_y;
+ bin.multisample_mode_4x = job->msaa;
+ }
/* START_TILE_BINNING resets the statechange counters in the hardware,
* which are what is used when a primitive is binned to a tile to
* figure out what new state packets need to be written to that tile's
* command list.
*/
- cl_u8(&bcl, VC4_PACKET_START_TILE_BINNING);
+ cl_emit(&job->bcl, START_TILE_BINNING, start);
/* Reset the current compressed primitives format. This gets modified
* by VC4_PACKET_GL_INDEXED_PRIMITIVE and
* VC4_PACKET_GL_ARRAY_PRIMITIVE, so it needs to be reset at the start
* of every tile.
*/
- cl_u8(&bcl, VC4_PACKET_PRIMITIVE_LIST_FORMAT);
- cl_u8(&bcl, (VC4_PRIMITIVE_LIST_FORMAT_16_INDEX |
- VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES));
+ cl_emit(&job->bcl, PRIMITIVE_LIST_FORMAT, list) {
+ list.data_type = _16_BIT_INDEX;
+ list.primitive_type = TRIANGLES_LIST;
+ }
job->needs_flush = true;
job->draw_width = vc4->framebuffer.width;
job->draw_height = vc4->framebuffer.height;
-
- cl_end(&job->bcl, bcl);
}
static void
struct vc4_context *vc4 = vc4_context(pctx);
for (int i = 0; i < stage_tex->num_textures; i++) {
- struct pipe_sampler_view *view = stage_tex->textures[i];
+ struct vc4_sampler_view *view =
+ vc4_sampler_view(stage_tex->textures[i]);
if (!view)
continue;
- struct vc4_resource *rsc = vc4_resource(view->texture);
- if (rsc->shadow_parent)
- vc4_update_shadow_baselevel_texture(pctx, view);
+
+ if (view->texture != view->base.texture)
+ vc4_update_shadow_baselevel_texture(pctx, &view->base);
vc4_flush_jobs_writing_resource(vc4, view->texture);
}
* we emit a dummy read.
*/
uint32_t num_elements_emit = MAX2(vtx->num_elements, 1);
+
/* Emit the shader record. */
- struct vc4_cl_out *shader_rec =
- cl_start_shader_reloc(&job->shader_rec, 3 + num_elements_emit);
- /* VC4_DIRTY_PRIM_MODE | VC4_DIRTY_RASTERIZER */
- cl_u16(&shader_rec,
- VC4_SHADER_FLAG_ENABLE_CLIPPING |
- (vc4->prog.fs->fs_threaded ?
- 0 : VC4_SHADER_FLAG_FS_SINGLE_THREAD) |
- ((info->mode == PIPE_PRIM_POINTS &&
- vc4->rasterizer->base.point_size_per_vertex) ?
- VC4_SHADER_FLAG_VS_POINT_SIZE : 0));
-
- /* VC4_DIRTY_COMPILED_FS */
- cl_u8(&shader_rec, 0); /* fs num uniforms (unused) */
- cl_u8(&shader_rec, vc4->prog.fs->num_inputs);
- cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.fs->bo, 0);
- cl_u32(&shader_rec, 0); /* UBO offset written by kernel */
-
- /* VC4_DIRTY_COMPILED_VS */
- cl_u16(&shader_rec, 0); /* vs num uniforms */
- cl_u8(&shader_rec, vc4->prog.vs->vattrs_live);
- cl_u8(&shader_rec, vc4->prog.vs->vattr_total_size);
- cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.vs->bo, 0);
- cl_u32(&shader_rec, 0); /* UBO offset written by kernel */
-
- /* VC4_DIRTY_COMPILED_CS */
- cl_u16(&shader_rec, 0); /* cs num uniforms */
- cl_u8(&shader_rec, vc4->prog.cs->vattrs_live);
- cl_u8(&shader_rec, vc4->prog.cs->vattr_total_size);
- cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.cs->bo, 0);
- cl_u32(&shader_rec, 0); /* UBO offset written by kernel */
+ cl_start_shader_reloc(&job->shader_rec, 3 + num_elements_emit);
+
+ cl_emit(&job->shader_rec, SHADER_RECORD, rec) {
+ rec.enable_clipping = true;
+
+ /* VC4_DIRTY_COMPILED_FS */
+ rec.fragment_shader_is_single_threaded =
+ !vc4->prog.fs->fs_threaded;
+
+ /* VC4_DIRTY_PRIM_MODE | VC4_DIRTY_RASTERIZER */
+ rec.point_size_included_in_shaded_vertex_data =
+ (info->mode == PIPE_PRIM_POINTS &&
+ vc4->rasterizer->base.point_size_per_vertex);
+
+ /* VC4_DIRTY_COMPILED_FS */
+ rec.fragment_shader_number_of_varyings =
+ vc4->prog.fs->num_inputs;
+ rec.fragment_shader_code_address =
+ cl_address(vc4->prog.fs->bo, 0);
+
+ rec.coordinate_shader_attribute_array_select_bits =
+ vc4->prog.cs->vattrs_live;
+ rec.coordinate_shader_total_attributes_size =
+ vc4->prog.cs->vattr_offsets[8];
+ rec.coordinate_shader_code_address =
+ cl_address(vc4->prog.cs->bo, 0);
+
+ rec.vertex_shader_attribute_array_select_bits =
+ vc4->prog.vs->vattrs_live;
+ rec.vertex_shader_total_attributes_size =
+ vc4->prog.vs->vattr_offsets[8];
+ rec.vertex_shader_code_address =
+ cl_address(vc4->prog.vs->bo, 0);
+ };
uint32_t max_index = 0xffff;
for (int i = 0; i < vtx->num_elements; i++) {
struct pipe_vertex_element *elem = &vtx->pipe[i];
struct pipe_vertex_buffer *vb =
&vertexbuf->vb[elem->vertex_buffer_index];
- struct vc4_resource *rsc = vc4_resource(vb->buffer);
+ struct vc4_resource *rsc = vc4_resource(vb->buffer.resource);
/* not vc4->dirty tracked: vc4->last_index_bias */
uint32_t offset = (vb->buffer_offset +
elem->src_offset +
uint32_t elem_size =
util_format_get_blocksize(elem->src_format);
- cl_reloc(job, &job->shader_rec, &shader_rec, rsc->bo, offset);
- cl_u8(&shader_rec, elem_size - 1);
- cl_u8(&shader_rec, vb->stride);
- cl_u8(&shader_rec, vc4->prog.vs->vattr_offsets[i]);
- cl_u8(&shader_rec, vc4->prog.cs->vattr_offsets[i]);
+ cl_emit(&job->shader_rec, ATTRIBUTE_RECORD, attr) {
+ attr.address = cl_address(rsc->bo, offset);
+ attr.number_of_bytes_minus_1 = elem_size - 1;
+ attr.stride = vb->stride;
+ attr.coordinate_shader_vpm_offset =
+ vc4->prog.cs->vattr_offsets[i];
+ attr.vertex_shader_vpm_offset =
+ vc4->prog.vs->vattr_offsets[i];
+ }
if (vb->stride > 0) {
max_index = MIN2(max_index,
if (vtx->num_elements == 0) {
assert(num_elements_emit == 1);
struct vc4_bo *bo = vc4_bo_alloc(vc4->screen, 4096, "scratch VBO");
- cl_reloc(job, &job->shader_rec, &shader_rec, bo, 0);
- cl_u8(&shader_rec, 16 - 1); /* element size */
- cl_u8(&shader_rec, 0); /* stride */
- cl_u8(&shader_rec, 0); /* VS VPM offset */
- cl_u8(&shader_rec, 0); /* CS VPM offset */
+
+ cl_emit(&job->shader_rec, ATTRIBUTE_RECORD, attr) {
+ attr.address = cl_address(bo, 0);
+ attr.number_of_bytes_minus_1 = 16 - 1;
+ attr.stride = 0;
+ attr.coordinate_shader_vpm_offset = 0;
+ attr.vertex_shader_vpm_offset = 0;
+ }
+
vc4_bo_unreference(&bo);
}
- cl_end(&job->shader_rec, shader_rec);
-
- struct vc4_cl_out *bcl = cl_start(&job->bcl);
- /* the actual draw call. */
- cl_u8(&bcl, VC4_PACKET_GL_SHADER_STATE);
- assert(vtx->num_elements <= 8);
- /* Note that number of attributes == 0 in the packet means 8
- * attributes. This field also contains the offset into shader_rec.
- */
- cl_u32(&bcl, num_elements_emit & 0x7);
- cl_end(&job->bcl, bcl);
+
+ cl_emit(&job->bcl, GL_SHADER_STATE, shader_state) {
+ /* Note that number of attributes == 0 in the packet means 8
+ * attributes. This field also contains the offset into
+ * shader_rec.
+ */
+ assert(vtx->num_elements <= 8);
+ shader_state.number_of_attribute_arrays =
+ num_elements_emit & 0x7;
+ }
vc4_write_uniforms(vc4, vc4->prog.fs,
&vc4->constbuf[PIPE_SHADER_FRAGMENT],
vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
{
struct vc4_context *vc4 = vc4_context(pctx);
+ struct pipe_draw_info local_info;
+
+ if (!info->count_from_stream_output && !info->indirect &&
+ !info->primitive_restart &&
+ !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
+ return;
if (info->mode >= PIPE_PRIM_QUADS) {
- util_primconvert_save_index_buffer(vc4->primconvert, &vc4->indexbuf);
- util_primconvert_save_rasterizer_state(vc4->primconvert, &vc4->rasterizer->base);
- util_primconvert_draw_vbo(vc4->primconvert, info);
- perf_debug("Fallback conversion for %d %s vertices\n",
- info->count, u_prim_name(info->mode));
- return;
+ if (info->mode == PIPE_PRIM_QUADS &&
+ info->count == 4 &&
+ !vc4->rasterizer->base.flatshade) {
+ local_info = *info;
+ local_info.mode = PIPE_PRIM_TRIANGLE_FAN;
+ info = &local_info;
+ } else {
+ util_primconvert_save_rasterizer_state(vc4->primconvert, &vc4->rasterizer->base);
+ util_primconvert_draw_vbo(vc4->primconvert, info);
+ perf_debug("Fallback conversion for %d %s vertices\n",
+ info->count, u_prim_name(info->mode));
+ return;
+ }
}
/* Before setting up the draw, do any fixup blits necessary. */
struct vc4_job *job = vc4_get_job_for_fbo(vc4);
+ /* Make sure that the raster order flags haven't changed, which can
+ * only be set at job granularity.
+ */
+ if (job->flags != vc4->rasterizer->tile_raster_order_flags) {
+ vc4_job_submit(vc4, job);
+ job = vc4_get_job_for_fbo(vc4);
+ }
+
vc4_get_draw_cl_space(job, info->count);
if (vc4->prim_mode != info->mode) {
vc4_emit_state(pctx);
+ bool needs_drawarrays_shader_state = false;
+
if ((vc4->dirty & (VC4_DIRTY_VTXBUF |
VC4_DIRTY_VTXSTATE |
VC4_DIRTY_PRIM_MODE |
vc4->prog.vs->uniform_dirty_bits |
vc4->prog.fs->uniform_dirty_bits)) ||
vc4->last_index_bias != info->index_bias) {
- vc4_emit_gl_shader_state(vc4, info, 0);
+ if (info->index_size)
+ vc4_emit_gl_shader_state(vc4, info, 0);
+ else
+ needs_drawarrays_shader_state = true;
}
vc4->dirty = 0;
/* Note that the primitive type fields match with OpenGL/gallium
* definitions, up to but not including QUADS.
*/
- struct vc4_cl_out *bcl = cl_start(&job->bcl);
- if (info->indexed) {
- uint32_t offset = vc4->indexbuf.offset;
- uint32_t index_size = vc4->indexbuf.index_size;
+ if (info->index_size) {
+ uint32_t index_size = info->index_size;
+ uint32_t offset = info->start * index_size;
struct pipe_resource *prsc;
- if (vc4->indexbuf.index_size == 4) {
- prsc = vc4_get_shadow_index_buffer(pctx, &vc4->indexbuf,
+ if (info->index_size == 4) {
+ prsc = vc4_get_shadow_index_buffer(pctx, info,
+ offset,
info->count, &offset);
index_size = 2;
} else {
- if (vc4->indexbuf.user_buffer) {
+ if (info->has_user_indices) {
prsc = NULL;
u_upload_data(vc4->uploader, 0,
info->count * index_size, 4,
- vc4->indexbuf.user_buffer,
+ info->index.user,
&offset, &prsc);
} else {
- prsc = vc4->indexbuf.buffer;
+ prsc = info->index.resource;
}
}
struct vc4_resource *rsc = vc4_resource(prsc);
- cl_start_reloc(&job->bcl, &bcl, 1);
+ struct vc4_cl_out *bcl = cl_start(&job->bcl);
+
+ /* The original design for the VC4 kernel UABI had multiple
+ * packets that used relocations in the BCL (some of which
+ * needed two BOs), but later modifications eliminated all but
+ * this one usage. We have an arbitrary 32-bit offset value,
+ * and need to also supply an arbitrary 32-bit index buffer
+ * GEM handle, so we have this fake packet we emit in our BCL
+ * to be validated, which the kernel uses at validation time
+ * to perform the relocation in the IB packet (without
+ * emitting to the actual HW).
+ */
+ uint32_t hindex = vc4_gem_hindex(job, rsc->bo);
+ if (job->last_gem_handle_hindex != hindex) {
+ cl_u8(&bcl, VC4_PACKET_GEM_HANDLES);
+ cl_u32(&bcl, hindex);
+ cl_u32(&bcl, 0);
+ job->last_gem_handle_hindex = hindex;
+ }
+
cl_u8(&bcl, VC4_PACKET_GL_INDEXED_PRIMITIVE);
cl_u8(&bcl,
info->mode |
VC4_INDEX_BUFFER_U16:
VC4_INDEX_BUFFER_U8));
cl_u32(&bcl, info->count);
- cl_reloc(job, &job->bcl, &bcl, rsc->bo, offset);
+ cl_u32(&bcl, offset);
cl_u32(&bcl, vc4->max_index);
+
+ cl_end(&job->bcl, bcl);
job->draw_calls_queued++;
- if (vc4->indexbuf.index_size == 4 || vc4->indexbuf.user_buffer)
+ if (info->index_size == 4 || info->has_user_indices)
pipe_resource_reference(&prsc, NULL);
} else {
uint32_t count = info->count;
uint32_t start = info->start;
uint32_t extra_index_bias = 0;
+ static const uint32_t max_verts = 65535;
+
+ /* GFXH-515 / SW-5891: The binner emits 16 bit indices for
+ * drawarrays, which means that if start + count > 64k it
+ * would truncate the top bits. Work around this by emitting
+ * a limited number of primitives at a time and reemitting the
+ * shader state pointing farther down the vertex attribute
+ * arrays.
+ *
+ * To do this properly for line loops or trifans, we'd need to
+ * make a new VB containing the first vertex plus whatever
+ * remainder.
+ */
+ if (start + count > max_verts) {
+ extra_index_bias = start;
+ start = 0;
+ needs_drawarrays_shader_state = true;
+ }
while (count) {
uint32_t this_count = count;
- uint32_t step = count;
- static const uint32_t max_verts = 65535;
-
- /* GFXH-515 / SW-5891: The binner emits 16 bit indices
- * for drawarrays, which means that if start + count >
- * 64k it would truncate the top bits. Work around
- * this by emitting a limited number of primitives at
- * a time and reemitting the shader state pointing
- * farther down the vertex attribute arrays.
- *
- * To do this properly for line loops or trifans, we'd
- * need to make a new VB containing the first vertex
- * plus whatever remainder.
- */
- if (extra_index_bias) {
- cl_end(&job->bcl, bcl);
+ uint32_t step;
+
+ if (needs_drawarrays_shader_state) {
vc4_emit_gl_shader_state(vc4, info,
extra_index_bias);
- bcl = cl_start(&job->bcl);
}
- if (start + count > max_verts) {
- switch (info->mode) {
- case PIPE_PRIM_POINTS:
- this_count = step = max_verts;
- break;
- case PIPE_PRIM_LINES:
- this_count = step = max_verts - (max_verts % 2);
- break;
- case PIPE_PRIM_LINE_STRIP:
- this_count = max_verts;
- step = max_verts - 1;
- break;
- case PIPE_PRIM_LINE_LOOP:
- this_count = max_verts;
- step = max_verts - 1;
- debug_warn_once("unhandled line loop "
- "looping behavior with "
- ">65535 verts\n");
- break;
- case PIPE_PRIM_TRIANGLES:
- this_count = step = max_verts - (max_verts % 3);
- break;
- case PIPE_PRIM_TRIANGLE_STRIP:
- this_count = max_verts;
- step = max_verts - 2;
- break;
- default:
- debug_warn_once("unhandled primitive "
- "max vert count, truncating\n");
- this_count = step = max_verts;
- }
- }
+ u_split_draw(info, max_verts, &this_count, &step);
- cl_u8(&bcl, VC4_PACKET_GL_ARRAY_PRIMITIVE);
- cl_u8(&bcl, info->mode);
- cl_u32(&bcl, this_count);
- cl_u32(&bcl, start);
+ cl_emit(&job->bcl, VERTEX_ARRAY_PRIMITIVES, array) {
+ array.primitive_mode = info->mode;
+ array.length = this_count;
+ array.index_of_first_vertex = start;
+ }
job->draw_calls_queued++;
count -= step;
extra_index_bias += start + step;
start = 0;
+ needs_drawarrays_shader_state = true;
}
}
- cl_end(&job->bcl, bcl);
/* We shouldn't have tripped the HW_2116 bug with the GFXH-515
* workaround.
}
static void
-vc4_clear(struct pipe_context *pctx, unsigned buffers,
+vc4_clear(struct pipe_context *pctx, unsigned buffers, const struct pipe_scissor_state *scissor_state,
const union pipe_color_union *color, double depth, unsigned stencil)
{
struct vc4_context *vc4 = vc4_context(pctx);
struct vc4_job *job = vc4_get_job_for_fbo(vc4);
+ if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
+ struct vc4_resource *rsc =
+ vc4_resource(vc4->framebuffer.zsbuf->texture);
+ unsigned zsclear = buffers & PIPE_CLEAR_DEPTHSTENCIL;
+
+ /* Clearing ZS will clear both Z and stencil, so if we're
+ * trying to clear just one then we need to draw a quad to do
+ * it instead. We need to do this before setting up
+ * tile-based clears in vc4->job, because the blitter may
+ * submit the current job.
+ */
+ if ((zsclear == PIPE_CLEAR_DEPTH ||
+ zsclear == PIPE_CLEAR_STENCIL) &&
+ (rsc->initialized_buffers & ~(zsclear | job->cleared)) &&
+ util_format_is_depth_and_stencil(vc4->framebuffer.zsbuf->format)) {
+ static const union pipe_color_union dummy_color = {};
+
+ perf_debug("Partial clear of Z+stencil buffer, "
+ "drawing a quad instead of fast clearing\n");
+ vc4_blitter_save(vc4);
+ util_blitter_clear(vc4->blitter,
+ vc4->framebuffer.width,
+ vc4->framebuffer.height,
+ 1,
+ zsclear,
+ &dummy_color, depth, stencil,
+ false);
+ buffers &= ~zsclear;
+ if (!buffers)
+ return;
+ job = vc4_get_job_for_fbo(vc4);
+ }
+ }
+
/* We can't flag new buffers for clearing once we've queued draws. We
* could avoid this by using the 3d engine to clear.
*/
if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
struct vc4_resource *rsc =
vc4_resource(vc4->framebuffer.zsbuf->texture);
- unsigned zsclear = buffers & PIPE_CLEAR_DEPTHSTENCIL;
-
- /* Clearing ZS will clear both Z and stencil, so if we're
- * trying to clear just one then we need to draw a quad to do
- * it instead.
- */
- if ((zsclear == PIPE_CLEAR_DEPTH ||
- zsclear == PIPE_CLEAR_STENCIL) &&
- (rsc->initialized_buffers & ~(zsclear | job->cleared)) &&
- util_format_is_depth_and_stencil(vc4->framebuffer.zsbuf->format)) {
- perf_debug("Partial clear of Z+stencil buffer, "
- "drawing a quad instead of fast clearing\n");
- vc4_blitter_save(vc4);
- util_blitter_clear(vc4->blitter,
- vc4->framebuffer.width,
- vc4->framebuffer.height,
- 1,
- zsclear,
- NULL, depth, stencil);
- buffers &= ~zsclear;
- if (!buffers)
- return;
- }
/* Though the depth buffer is stored with Z in the high 24,
* for this field we just need to store it in the low 24.
if (buffers & PIPE_CLEAR_STENCIL)
job->clear_stencil = stencil;
- rsc->initialized_buffers |= zsclear;
+ rsc->initialized_buffers |= (buffers & PIPE_CLEAR_DEPTHSTENCIL);
}
job->draw_min_x = 0;
projects / mesa.git / blobdiff